entity DDS is
Port(
resetn : in std_logic;
clk_in : in std_logic;
clk_out : out std_logic;
count_out : out std_logic_vector(MM downto 0)
);
end DDS;
architecture arch_DDS of DDS is
signal count : std_logic_vector(MM downto 0);
signal clk : std_logic;
signal sign_del : std_logic;
begin
★★ process(resetn,clk_in)
variable count_v : std_logic_vector(MM downto 0);
begin
if resetn='0' then
count_v:=(others=>'0');
sign_del<='0';
count<=(others=>'0');
elsif clk_in'event and clk_in='1' then
count_v:=count_v+N;
if count_v>=M then
count_v:=count_v-M;
count<=count_v;
sign_del<='0';
else
count<=count_v;
sign_del<='1';
end if;
end if;
end process; ★★
process(resetn,clk_in)
begin
if resetn='0' then
count_out<=(others=>'0');
elsif clk_in'event and clk_in='0' then
count_out<=count;
end if;
end process;
clk<=not clk_in;
clk_out<=clk and sign_del;
end arch_DDS;
这个用DDS实现，能否详细解释一下删除部分的程序段（两个★★之间的部分），我看不太懂，谢谢！作者: shijf1977 时间: 2005-6-8 08:57
（7*3＋3*2）/10＝2.7作者: cooldog 时间: 2005-6-8 18:40
不好意思，这个程序用的是吞脉冲法作者: cooldog 时间: 2005-6-8 18:50
下面是用吞脉冲法一段程序：
entity DDS is
Port(
resetn : in std_logic;
clk_in : in std_logic;
clk_out : out std_logic;
count_out : out std_logic_vector(MM downto 0)
);
end DDS;
architecture arch_DDS of DDS is
signal count : std_logic_vector(MM downto 0);
signal clk : std_logic;
signal sign_del : std_logic;
begin
★★ process(resetn,clk_in)
variable count_v : std_logic_vector(MM downto 0);
begin
if resetn='0' then
count_v:=(others=>'0');
sign_del<='0';
count<=(others=>'0');
elsif clk_in'event and clk_in='1' then
count_v:=count_v+N;
if count_v>=M then
count_v:=count_v-M;
count<=count_v;
sign_del<='0';
else
count<=count_v;
sign_del<='1';
end if;
end if;
end process; ★★
process(resetn,clk_in)
begin
if resetn='0' then
count_out<=(others=>'0');
elsif clk_in'event and clk_in='0' then
count_out<=count;
end if;
end process;
clk<=not clk_in;
clk_out<=clk and sign_del;
end arch_DDS;
这个用DDS实现，能否详细解释一下删除部分的程序段（两个★★之间的部分），我看不太懂，谢谢！[em27][em14]
