合资电子制造公司中国研发中心高薪诚聘

Senior PCB Layout Design Engineer

Duty and Responsibilities 
 erform schematics capture
 Generate and update bill of material
 Layout floor planning, physical layout, routing, and verification including DRC, LVS, and LPE
 Layout techniques to improve circuit performance. Work with hardware designer to define optimal layout solutions, based on design objectives
 Component symbol and footprint library creation
Qualifications/Capabilities: 
 Bachelor degree or above in electronics is preferred
 3 years experience in high speed PCB design with more than 8 layers. 
 Schematics capture using Cadence Concept HDL
 Create and maintain symbol & footprints library
 lacement and routing using Cadence Allegro or Mentor Graphics tools
 In-depth knowledge in EMC, Signal integrity simulation
 Gerber out and DFM check using valor 5000
 Well spoken and written English is a requirement for the positions

[此贴子已经被一通百通于2006-3-28 8:55:05编辑过]