上升沿下降沿同时触发好像比较困难阿，高人们教教我吧作者: long 时间: 2003-8-25 09:06
根据你的说法，给你做了
library ieee;
use ieee.std_logic_1164.all;
entity dp is
port
(one,zero:in std_logic;
output:buffer std_logic);
end;
architecture arch of dp is
signal clk:std_logic;
signal cho:std_logic;
begin
p1:process
begin
if cho='0' then clk<=one;
else clk<=zero;
end if;
end process p1;
p2:process(clk)
begin
if rising_edge(clk) then cho<=not cho;
end if;
end process p2;
output<=cho;
end arch;作者: hstaii@163.net 时间: 2003-8-25 09:13
