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标题: U-boot-1.1.6移植到S3C2410（从NAND FLASH启动） [打印本页]

作者: m1_ljp 时间: 2013-3-15 14:05 标题: U-boot-1.1.6移植到S3C2410（从NAND FLASH启动）

建立环境变量
  在/etc/profile文件添加交叉编译器的路径
pathmunge /usr/local/arm/3.4.1/bin
二、u-boot-1.1.6移植
1) u-boot-1.1.6的获取：

ftp://ftp.denx.de/pub/u-boot/u-boot-1.1.6.tar.bz2
2) 解压u-boot
  tar -xjvf u-boot-1.1.6.tar.bz2
3) 编译测试：
make smdk2410_config
make u-boot.bin
  如无意外，u-boot根目录下会生成u-boot.bin文件，该文件可以通过JTAG下载到nand flash上面，但由于源程序只支持从nor flash启动，所以目标文件尚不不可。
4) 修改board/smdk2410/lowevel_init.S文件
  依据自己的开发板修改。
#include config.h>
#include version.h>
/* some parameters for the board */
/*
*
* Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
*
* Copyright (C) 2002 Samsung Electronics SW.LEE
*
*/
#define BWSCON 0x48000000
/* BWSCON */
#define DW8          (0x0)
#define DW16          (0x1)
#define DW32          (0x2)
#define WAIT          (0x12)
#define UBLB          (0x13)
#define B1_BWSCON       (DW16)
#define B2_BWSCON       (DW16)
#define B3_BWSCON       (DW16 + WAIT + UBLB)
#define B4_BWSCON       (DW16)
#define B5_BWSCON       (DW16)
#define B6_BWSCON       (DW16) /*for 32M 16-bit SDRAM*/
#define B7_BWSCON       (DW32)
/* BANK0CON */
#define B0_Tacs          0x0 /* 0clk */
#define B0_Tcos          0x0 /* 0clk */
#define B0_Tacc          0x7 /* 14clk */
#define B0_Tcoh          0x0 /* 0clk */
#define B0_Tah          0x0 /* 0clk */
#define B0_Tacp          0x0
#define B0_PMC          0x0 /* normal */
/* BANK1CON */
#define B1_Tacs          0x0 /* 0clk */
#define B1_Tcos          0x0 /* 0clk */
#define B1_Tacc          0x7 /* 14clk */
#define B1_Tcoh          0x0 /* 0clk */
#define B1_Tah          0x0 /* 0clk */
#define B1_Tacp          0x0
#define B1_PMC          0x0
#define B2_Tacs          0x0
#define B2_Tcos          0x0
#define B2_Tacc          0x7
#define B2_Tcoh          0x0
#define B2_Tah          0x0
#define B2_Tacp          0x0
#define B2_PMC          0x0
#define B3_Tacs          0x0 /* 0clk */
#define B3_Tcos          0x3 /* 4clk */
#define B3_Tacc          0x7 /* 14clk */
#define B3_Tcoh          0x1 /* 1clk */
#define B3_Tah          0x0 /* 0clk */
#define B3_Tacp          0x3 /* 6clk */
#define B3_PMC          0x0 /* normal */
#define B4_Tacs          0x0 /* 0clk */
#define B4_Tcos          0x0 /* 0clk */
#define B4_Tacc          0x7 /* 14clk */
#define B4_Tcoh          0x0 /* 0clk */
#define B4_Tah          0x0 /* 0clk */
#define B4_Tacp          0x0
#define B4_PMC          0x0 /* normal */
#define B5_Tacs          0x0 /* 0clk */
#define B5_Tcos          0x0 /* 0clk */
#define B5_Tacc          0x7 /* 14clk */
#define B5_Tcoh          0x0 /* 0clk */
#define B5_Tah          0x0 /* 0clk */
#define B5_Tacp          0x0
#define B5_PMC          0x0 /* normal */
#define B6_MT          0x3 /* SDRAM */
#define B6_Trcd             0x1
#define B6_SCAN          0x1 /* 9bit */
#define B7_MT          0x3 /* SDRAM */
#define B7_Trcd          0x1 /* 3clk */
#define B7_SCAN          0x1 /* 9bit */
/* REFRESH parameter */
#define REFEN          0x1 /* Refresh enable */
#define TREFMD          0x0 /* CBR(CAS before RAS)/Auto refresh */
#define Trp          0x0 /* 2clk */
#define Trc          0x3 /* 7clk */
#define Tchr          0x2 /* 3clk */
#define REFCNT          1113 /* period="15".6us, HCLK="60Mhz", (2048+1-15.6*60) */
/**************************************/
_TEXT_BASE:
.word TEXT_BASE
.globl lowlevel_init
lowlevel_init:
/* memory control configuration */
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
ldr r0, =SMRDATA
ldr r1, _TEXT_BASE
sub r0, r0, r1
ldr r1, =BWSCON /* Bus Width Status Controller */
add r2, r0, #13*4
nero:
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne nero
/* everything is fine now */
mov pc, lr
.ltorg
/* the literal pools origin */
SMRDATA:
.word (0+(B1_BWSCON4)+(B2_BWSCON8)+(B3_BWSCON12)+(B4_BWSCON16)+(B5_BWSCON20)+(B6_BWSCON24)+(B7_BWSCON28))
.word ((B0_Tacs13)+(B0_Tcos11)+(B0_Tacc8)+(B0_Tcoh6)+(B0_Tah4)+(B0_Tacp2)+(B0_PMC))
.word ((B1_Tacs13)+(B1_Tcos11)+(B1_Tacc8)+(B1_Tcoh6)+(B1_Tah4)+(B1_Tacp2)+(B1_PMC))
.word ((B2_Tacs13)+(B2_Tcos11)+(B2_Tacc8)+(B2_Tcoh6)+(B2_Tah4)+(B2_Tacp2)+(B2_PMC))
.word ((B3_Tacs13)+(B3_Tcos11)+(B3_Tacc8)+(B3_Tcoh6)+(B3_Tah4)+(B3_Tacp2)+(B3_PMC))
.word ((B4_Tacs13)+(B4_Tcos11)+(B4_Tacc8)+(B4_Tcoh6)+(B4_Tah4)+(B4_Tacp2)+(B4_PMC))
.word ((B5_Tacs13)+(B5_Tcos11)+(B5_Tacc8)+(B5_Tcoh6)+(B5_Tah4)+(B5_Tacp2)+(B5_PMC))
.word ((B6_MT15)+(B6_Trcd2)+(B6_SCAN))
.word ((B7_MT15)+(B7_Trcd2)+(B7_SCAN))
.word ((REFEN23)+(TREFMD22)+(Trp20)+(Trc18)+(Tchr16)+REFCNT)
.word 0xb2
.word 0x30
.word 0x30
5)  添加对nand flash的读取支持
  参考vivi的nand flash启动而修改,将vivi的\include\s3c2410\nand_read.c文件放到u-boot的\board\smdk2410目录下面。或者，在\board\smdk2410目录下面新建一个nand_read.c文件，在文件中加入如下内容：
/*
* vivi/s3c2410/nand_read.c: Simple NAND read functions for booting from NAND
*
* Copyright (C) 2002 MIZI Research, Inc.
*
* Author: Hwang, Chideok
* Date : $Date: 2002/08/14 10:26:47 $
*
* $Revision: 1.6 $
* $Id: param.c,v 1.9 2002/07/11 06:17:20 nandy Exp
*
* History
*
* 2002-05-xx: Hwang, Chideok
* - 瞪芭扼绊抄叼俊霸淋.
*
* 2002-05-xx: Chan Gyun Jeong
* - 抄叼狼何殴阑罐绊力措肺悼累窍档废荐沥.
*
* 2002-08-10: Yong-iL Joh
* - SECTOR_SIZE啊 512牢仇篮促佬档废荐沥
*
*/
#include config.h>
#define __REGb(x) (*(volatile unsigned char *)(x))
#define __REGi(x) (*(volatile unsigned int *)(x))
#define NF_BASE       0x4e000000
#define NFCONF       __REGi(NF_BASE + 0x0)
#define NFCMD       __REGb(NF_BASE + 0x4)
#define NFADDR       __REGb(NF_BASE + 0x8)
#define NFDATA       __REGb(NF_BASE + 0xc)
#define NFSTAT       __REGb(NF_BASE + 0x10)
#define BUSY 1
inline void wait_idle(void) {
int i;
while(!(NFSTAT & BUSY))
   for(i=0; i10; i++);
}
#define NAND_SECTOR_SIZE 512
#define NAND_BLOCK_MASK       (NAND_SECTOR_SIZE - 1)
/* low level nand read function */
int
nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
{
int i, j;
if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {
      return -1; /* invalid alignment */
}
/* chip Enable */
NFCONF &= ~0x800;
for(i=0; i10; i++);
for(i=start_addr; i  (start_addr + size);) {
   /* READ0 */
   NFCMD = 0;
   /* Write Address */
   NFADDR = i & 0xff;
   NFADDR = (i >> 9) & 0xff;
   NFADDR = (i >> 17) & 0xff;
   NFADDR = (i >> 25) & 0xff;
   wait_idle();
   for(j=0; j  NAND_SECTOR_SIZE; j++, i++) {
*buf = (NFDATA & 0xff);
buf++;
   }
}
/* chip Disable */
NFCONF |= 0x800; /* chip disable */
return 0;
}
6) 增加对nand_read.c的编译链接
修改board/smdk2410/makefile文件：
COBJS := $(BOARD).o flash.o nand_read.o
7) 添加将u-boot从nand flash复制到SDRAM的函数
修改cpu/arm920t/start.S文件：
  7.1 在 ldr pc, _start_armboot 语句前添加：
#ifdef CONFIG_S3C2410_NAND_BOOT /* CONFIG_S3C2410_NAND_BOOT=y */
bl copy_myself
@ jump to ram
ldr r1, =on_the_ram
add pc, r1, #0
nop
nop
1: b 1b       @ infinite loop
on_the_ram:
#endif
  7.2 在_start_armboot: .word start_armboot 语句之后追加：
/********************************************
* copy_myself | copy vivi to ram
********************************************/
#ifdef CONFIG_S3C2410_NAND_BOOT
copy_myself:
mov r10, lr
@ reset NAND
mov r1, #NAND_CTL_BASE
ldr r2, =0xf830       @ initial value
str r2, [r1, #oNFCONF]
ldr r2, [r1, #oNFCONF]
bic r2, r2, #0x800       @ enable chip
str r2, [r1, #oNFCONF]
mov r2, #0xff       @ RESET command
strb r2, [r1, #oNFCMD]
mov r3, #0          @ wait
1: add r3, r3, #0x1
cmp r3, #0xa
blt 1b
2: ldr r2, [r1, #oNFSTAT] @ wait ready
tst r2, #0x1
beq 2b
ldr r2, [r1, #oNFCONF]
orr r2, r2, #0x800       @ disable chip
str r2, [r1, #oNFCONF]
@ get read to call C functions (for nand_read())
ldr sp, DW_STACK_START @ setup stack pointer
mov fp, #0          @ no previous frame, so fp="0"
@ copy vivi to RAM
ldr r0, =UBOOT_RAM_BASE
mov r1, #0x0
mov r2, #0x20000
bl nand_read_ll
tst r0, #0x0
beq ok_nand_read
#ifdef CONFIG_DEBUG_LL /* is not set */
bad_nand_read:
ldr r0, STR_FAIL
ldr r1, SerBase
bl PrintWord
1: b 1b       @ infinite loop
            @ ?òè??aó?°??aì???á?·?μ?#ifdef...#endif??ía
#endif

ok_nand_read:
#ifdef CONFIG_DEBUG_LL /* is not set */
ldr r0, STR_OK
ldr r1, SerBase
bl PrintWord
#endif
@ verify
mov r0, #0
ldr r1, =UBOOT_RAM_BASE @VIVI_RAM_BASE
mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes
go_next:
ldr r3, [r0], #4
ldr r4, [r1], #4
teq r3, r4
bne notmatch
subs r2, r2, #4
beq done_nand_read
bne go_next
notmatch:
#ifdef CONFIG_DEBUG_LL /* is not set */
sub r0, r0, #4
ldr r1, SerBase
bl PrintHexWord
ldr r0, STR_FAIL
ldr r1, SerBase
bl PrintWord
#endif
1: b 1b
done_nand_read:
#ifdef CONFIG_DEBUG_LL /* is not set */
ldr r0, STR_OK
ldr r1, SerBase
bl PrintWord
#endif
mov pc, r10
@ clear memory
@ r0: start address
@ r1: length
mem_clear:
mov r2, #0
mov r3, r2
mov r4, r2
mov r5, r2
mov r6, r2
mov r7, r2
mov r8, r2
mov r9, r2
clear_loop:
stmia    {r2-r9}
subs r1, r1, #(8 * 4)
stmia    {r2}
subs r1, r1, #4
bne clear_loop
mov pc, lr
#endif @ CONFIG_S3C2410_NAND_BOOT
在文件末尾加入：
.align 2
DW_STACK_START:
.word STACK_BASE+STACK_SIZE-4
8) 添加支持nand_read.c必要的宏。
修改/include/configs/smdk2410.h，追加下面代码：
/************************************************************
* Nand flash BOOT
**********************************************************/
#define CONFIG_S3C2410_NAND_BOOT 1
#define STACK_BASE 0x31f00000
#define STACK_SIZE 0x8000
#define UBOOT_RAM_BASE 0x31f80000
/* NAND Flash Controller */
#define NAND_CTL_BASE 0x4E000000
#define bINT_CTL(Nb) __REG(INT_CTL_BASE + (Nb))
/* Offset */
#define oNFCONF 0x00
#define oNFCMD 0x04
#define oNFADDR 0x08
#define oNFDATA 0x0c
#define oNFSTAT 0x10
#define oNFECC 0x14
9) 重新编译：
make smdk2410_config
make u-boot.bin

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