when 4 => shi <= "1001100";
when 3 => shi <= "0000110";
when 2 => shi <= "0010010";
when 1 => shi <= "1001111";
when 0 => shi <= "0000001";
end case;
case feng_t is
when 9 => feng <= "0000100";
when 8 => feng <= "0000000";
when 7 => feng <= "0001111";
when 6 => feng <= "0100000";
when 5 => feng <= "0100100";
when 4 => feng <= "1001100";
when 3 => feng <= "0000110";
when 2 => feng <= "0010010";
when 1 => feng <= "1001111";
when 0 => feng <= "0000001";
end case;
case fens_t is
when 5 => fens <= "0100100";
when 4 => fens <= "1001100";
when 3 => fens <= "0000110";
when 2 => fens <= "0010010";
when 1 => fens <= "1001111";
when 0 => fens <= "0000001";
end case;
case shig_t is
when 9 => shig <= "0000100";
when 8 => shig <= "0000000";
when 7 => shig <= "0001111";
when 6 => shig <= "0100000";
when 5 => shig <= "0100100";
when 4 => shig <= "1001100";
when 3 => shig <= "0000110";
when 2 => shig <= "0010010";
when 1 => shig <= "1001111";
when 0 => shig <= "0000001";
end case;
case shis_t is
when 2 => shis <= "0010010";
when 1 => shis <= "1001111";
when 0 => shis <= "0000001";
end case;
end process c;
end first;
和汇编有的一拼啊，呵呵，由于是新手，所以很多程序都带有单片机的想法，其实VHDL和C、FPGA和单片机是两种不同的语言、芯片，主要是要有并行思想和状态机的概念，很遗憾我现在好像都没有。
设置模式开关是sw01.、分钟设置按钮key01、key02 。
