Error: M4K memory block WYSIWYG primitive "ram_2:inst|altsyncram:altsyncram_component|altsyncram_6bd1:auto_generated|altsyncram_c8f2:altsyncram1|ram_block3a1" utilizes the dual-port dual-clock mode. However, this mode is not supported in Cyclone II device family in this version of Quartus II software. Please refer to the Cyclone II FPGA Family Errata Sheet for more information on this feature. 用过quartus的前辈能不能帮忙看看这是什么错啊？作者: kzw 时间: 2006-11-6 18:27
