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标题: beagle board dm3730添加串口4 [打印本页]

作者: 我是MT 时间: 2015-2-12 10:48 标题: beagle board dm3730添加串口4

原始代码只有串口1-3。添加串口4按照以下几个步骤：
1.修改arch/arm/mach-omap2/serial.c
添加串口4的信息
101 static struct plat_serial8250_port serial_platform_data2[] = {
102       {
103                .mapbase       = OMAP_UART3_BASE,
104                .irq          = 74,
105                .flags       = UPF_BOOT_AUTOCONF,
106                .iotype       = UPIO_MEM,
107                .regshift    = 2,
108                .uartclk       = OMAP24XX_BASE_BAUD * 16,
109       }, {
110                .flags       = 0
111       }
112 };
113
114 //#ifdef CONFIG_ARCH_OMAP4
115 static struct plat_serial8250_port serial_platform_data3[] = {
116       {
117                .mapbase       = OMAP_UART4_BASE,
118 #ifdef CONFIG_ARCH_OMAP3
119                .irq          = 80,
120 #elif defined (CONFIG_ARCH_OMAP4)
121                .irq          = 70,
122 #endif
123                .flags       = UPF_BOOT_AUTOCONF,
124                .iotype       = UPIO_MEM,
125                .regshift    = 2,
126                .uartclk       = OMAP24XX_BASE_BAUD * 16,
127       }, {
128                .flags       = 0
129       }
130 };
131 //#endif

2修改arch/arm/mach-omap2/prcm-common.h
添加串口4的寄存器宏定义
383 /* CM_FCLKEN_PER, CM_ICLKEN_PER, PM_WKEN_PER shared bits */
384 #define OMAP3630_EN_UART4                            (1 << 18)
385 #define OMAP3630_EN_UART4_SHIFT                      (18)

425 /* CM_IDLEST_PER, PM_WKST_PER shared bits */
426 #define OMAP3630_ST_UART4_MASK                         (1 << 18)
427 #define OMAP3630_ST_UART4_SHIFT                      18

3.修改arch/arm/mach-omap2/clock34xx_data.c
这个文件应该是配置时钟，外设使能的
按照uart3的配置添加uart4的
2563 static struct clk uart3_fck = {
2564       .name          = "uart3_fck",
2565       .ops          = &clkops_omap2_dflt_wait,
2566       .parent       = &per_48m_fck,
2567       .enable_reg    = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2568       .enable_bit    = OMAP3430_EN_UART3_SHIFT,
2569       .clkdm_name    = "per_clkdm",
2570       .recalc       = &followparent_recalc,
2571 };
2572
2573 static struct clk uart4_fck = {
2574       .name          = "uart4_fck",
2575       .ops          = &clkops_omap2_dflt_wait,
2576       .parent       = &per_48m_fck,
2577       .enable_reg    = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2578       .enable_bit    = OMAP3630_EN_UART4_SHIFT,
2579       .clkdm_name    = "per_clkdm",
2580       .recalc       = &followparent_recalc,
2581 };

2823 static struct clk uart3_ick = {
2824       .name          = "uart3_ick",
2825       .ops          = &clkops_omap2_dflt_wait,
2826       .parent       = &per_l4_ick,
2827       .enable_reg    = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2828       .enable_bit    = OMAP3430_EN_UART3_SHIFT,
2829       .clkdm_name    = "per_clkdm",
2830       .recalc       = &followparent_recalc,
2831 };
2832 static struct clk uart4_ick = {
2833       .name          = "uart4_ick",
2834       .ops          = &clkops_omap2_dflt_wait,
2835       .parent       = &per_l4_ick,
2836       .enable_reg    = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2837       .enable_bit    = OMAP3630_EN_UART4_SHIFT,
2838       .clkdm_name    = "per_clkdm",
2839       .recalc       = &followparent_recalc,
2840 };

3451       CLK(NULL,    "per_48m_fck",  &per_48m_fck, CK_3XXX),
3452       CLK(NULL,    "uart3_fck", &uart3_fck,    CK_3XXX),
3453       CLK(NULL,    "uart4_fck", &uart4_fck,    CK_3XXX),
3454       CLK(NULL,    "gpt2_fck",    &gpt2_fck,    CK_3XXX),

3475       CLK(NULL,    "wdt3_ick",    &wdt3_ick,    CK_3XXX),
3476       CLK(NULL,    "uart3_ick", &uart3_ick,    CK_3XXX),
3477       CLK(NULL,    "uart4_ick", &uart4_ick,    CK_3XXX),
3478       CLK(NULL,    "gpt9_ick",    &gpt9_ick,    CK_3XXX),

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