addr = idx<<SPI_FLASH_SECTOR_BIT;
writel(addr, (void*)(spi_char.mem_virt+SPI_ADDR));
word = readw((void *)(spi_char.mem_virt+SPI_CTRL));
word |= SPI_CTRL_SCGO; /* set cycle */
word |= SPI_CTRL_ACS; /* Enable Atomic Cycle Sequence */
word &= ~SPI_CTRL_SPOP;
word &= ~SPI_CTRL_COP;
word = word | SPI_CTRL_OPMENU_4KERASE<<SPI_CTRL_COP_SHIFT; /* write */
word &= ~SPI_CTRL_DBC;
word = word | 0x00<<SPI_CTRL_DBC_SHIFT; /* write count=1 */
word &= ~SPI_CTRL_DC;
/* check the status */
val = readw((void *)(spi_char.mem_virt+SPI_STATUS));
while(val & SPI_STATUS_SCIP)
{
val = readw((void *)(spi_char.mem_virt+SPI_STATUS));/* check the status */
}
/* check the status */
val = readw((void *)(spi_char.mem_virt+SPI_STATUS));
while(val & SPI_STATUS_SCIP)
{
val = readw((void *)(spi_char.mem_virt+SPI_STATUS));/* check the status */
}
word = readw((void *)(spi_char.mem_virt+SPI_STATUS));
word |= SPI_STATUS_CDS; /* clear Cycle Done Status flag */
word |= SPI_STATUS_BAS; /* clear blocked flag */
writew(word, (void *)(spi_char.mem_virt+SPI_STATUS));