1、一般这是什么错误：ise9.1i

ERROR:Xst:528 - Multi-source in Unit <ram_ctrl> on signal <EN>
Sources are:
   Signal <ram_ctrl_inst/EN> is assigned to logic
   Signal <ram_ctrl_inst/WE> in Unit <ram_ctrl> is assigned to GND
   Signal <ram_ctrl_inst/EN> in Unit <ram_ctrl> is assigned to GND

多源是什么意思呀，大家有遇到过这样的问题吗

2、我想用FPGA内部的RAM资源，但是生成的核不能实例化，在仿真顶层文件时它总是报错：

# ** Error: (vsim-3033) make_data_top.v(22): Instantiation of 'ram' failed. The design unit was not found.
#         Region: /make_data_tb_v/uut
#         Searched libraries:
#             C:\Modeltech_5.8a\win32\XilinxCoreLib_ver
#             C:\Modeltech_5.8a\win32\unisims_ver
#             work

这是什么原因，我装modelsim时生成过xilinx核，大家帮帮忙，谢谢哦