Board logo

标题: 求助:HDL编译问题 [打印本页]

作者: lengzhu    时间: 2007-11-1 20:18     标题: 求助:HDL编译问题

我是第一次用EDK9.1,照着技术手册上的例子作了一下,在Generate Netlist的时候,产生了下面的错误,然后plagen 就失败了

*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "C:/EDK/hw/XilinxProcessorIPLib/pcores/dsocm_v10_v2_00_b/hdl/vhdl/and_or_mux.vhd" in Library dsocm_v10_v2_00_b.
Entity <and_or_mux> compiled.
Entity <and_or_mux> (Architecture <IMP>) compiled.
Compiling vhdl file "C:/EDK/hw/XilinxProcessorIPLib/pcores/dsocm_v10_v2_00_b/hdl/vhdl/dsocm_v10.vhd" in Library dsocm_v10_v2_00_b.
Entity <dsocm_v10> compiled.
Entity <dsocm_v10> (Architecture <IMP>) compiled.
Compiling vhdl file "D:/EDK/hdl/docm_wrapper.vhd" in Library work.
ERROR:HDLParsers:3278 - Can't write file "xst/work/sub00/vhpl00.vho": Permission denied
ERROR:HDLParsers:309 - Can not overwrite the object file in library work.
Entity <docm_wrapper> (Architecture <STRUCTURE>) compiled.
-->
不知道怎么搞了,有高手指点下没有啊?实在是不行了啊跪求解决方法






欢迎光临 电子技术论坛_中国专业的电子工程师学习交流社区-中电网技术论坛 (http://bbs.eccn.com/) Powered by Discuz! 7.0.0