ut std_logic_vector(3 downto 0));
end rom24s10;
architecture behav of rom24s10 is
subtype word is std_logic_vector(3 downto 0);
type memory is array (0 to 255) of word;
signal adr_in:integer range 0 to 255;
VARIBLE rom:memory;
VARIBLE startup;boolean:=true:
VARIBLE l:line;
VARIBLE j:integer;
file romin:text is in "rom24s10.in";
begin
process(g1,g2,adr)
if startup then
for j in rom'range loop
readline (romin,l);
read (l,rom(j));
end loop;
startup:=false;
end if;
adr_in<=conv_integer(adr);
if(g1='1' and g2='1')then
dout<=rom(adr_in);
else
dout<="ZZZZ";
end if;
end process;
end behav;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity rom24s10 is
port(g1,g2:in std_logic;
adr:in std_logic_vector(7 downto 0);
doutut std_logic_vector(3 downto 0));
end rom24s10;
architecture behav of rom24s10 is
subtype word is std_logic_vector(3 downto 0);
type memory is array (0 to 255) of word;
signal adr_in:integer range 0 to 255;
VARIBLE rom:memory;
VARIBLE startup;boolean:=true:
VARIBLE l:line;
VARIBLE j:integer;
file romin:text is in "rom24s10.in";
begin
process(g1,g2,adr)
if startup then
for j in rom'range loop
readline (romin,l);
read (l,rom(j));
end loop;
startup:=false;
end if;
adr_in<=conv_integer(adr);
if(g1='1' and g2='1')then
dout<=rom(adr_in);
else
dout<="ZZZZ";
end if;
end process;
end behav;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity rom24s10 is
port(g1,g2:in std_logic;
adr:in std_logic_vector(7 downto 0);
doutut std_logic_vector(3 downto 0));
end rom24s10;
architecture behav of rom24s10 is
subtype word is std_logic_vector(3 downto 0);
type memory is array (0 to 255) of word;
signal adr_in:integer range 0 to 255;
variable rom:memory;
variable startup;boolean:=true:
variable l:line;
variable j:integer;
file romin:text is in "rom24s10.in";
begin
process(g1,g2,adr)
if startup then
for j in rom'range loop
readline (romin,l);
read (l,rom(j));
end loop;
startup:=false;
end if;
adr_in<=conv_integer(adr);
if(g1='1' and g2='1')then
dout<=rom(adr_in);
else
dout<="ZZZZ";
end if;
end process;
end behav;
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