下面是一个简单的多路选择器,编译时候不通过,我应该怎么设置文件目录,还有编译的时候应该按照什么顺序以及应该注意什么,谢谢各位好心人
library ieee;
use ieee.std_logic_1164.all;
entity mux is
port(a1,a2,a3,s0,s1 :in std_logic;
outy ut std_logic);
end mux;
architecture behave of mux is
COMPONENT MUX21A
port(a,b,s:IN std_logic;
y:OUT std_logic);
END COMPONENT;SIGNAL tmp : STD_LOGIC;
begin
u1:mux21a PORT MAP(a=>a2,b=>a3,s=>s0,y=>tmp);
u2:mux21a PORT MAP(a=>a1,b=>tmp,s=>s1,y=>outy);
END ARCHITECTURE behave;
library ieee;
use ieee.std_logic_1164.all;
ENTITY mux21a IS
PORT(a,b,s:IN std_logic;
y:OUT std_logic);
END ENTITY mux21a;
ARCHITECTURE one OF mux21a IS
BEGIN
PROCESS(a,b,s)
BEGIN
IF s='0'THEN y<=a;ELSE y<=b;
END IF;
END PROCESS;
END ARCHITECTURE one;
先谢谢你,错误如下,我是建立了两个文件:mux21a在文件E:\mux21a文件下面,木mux在文件E:\mux下面,我先编译的mux21a能通过,再编译没木星mux的时候就报错了,我不知道元件例化的过程和编译顺序,请指教下,谢谢
Error (10500): VHDL syntax error at mux.vhd(10) near text ?
Error (10500): VHDL syntax error at mux.vhd(10) near text "?; expecting ":", or ","
Error (10500): VHDL syntax error at mux.vhd(10) near text ?
Error (10500): VHDL syntax error at mux.vhd(12) near text ?
Error (10500): VHDL syntax error at mux.vhd(12) near text "?; expecting ";", or an identifier
Error (10500): VHDL syntax error at mux.vhd(12) near text ?
Error (10500): VHDL syntax error at mux.vhd(16) near text ?
Error (10500): VHDL syntax error at mux.vhd(16) near text "?; expecting ")", or ","
Error (10500): VHDL syntax error at mux.vhd(16) near text ?
Error (10500): VHDL syntax error at mux.vhd(17) near text ?
Error (10500): VHDL syntax error at mux.vhd(17) near text "?; expecting ")", or ","
Error (10500): VHDL syntax error at mux.vhd(17) near text
谢谢楼上的,由于是初学,还有很多问题不明白,真的很感谢
学习了 谢谢
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