LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH;
ENTITY dff IS
PORT ( clk : IN STD_LOGIC;
q : OUT STD_LOGIC);
END dff;
ARCHITECTURE dff1 OF dff IS
BEGIN
PROCESS (clk)
VARIABLE tmp:STD_LOGIC:='0';
BEGIN
IF clk='1' AND clk'EVENT THEN
--AND clk'LAST_VALUE = '0' THEN
q<=NOT tmp ;
tmp:=NOT tmp;
END IF;
END PROCESS;
END dff1;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH;
ENTITY muxdff IS
PORT (clk : IN STD_LOGIC;
cp : OUT STD_LOGIC);
END muxdff;
ARCHITECTURE mux_dff1 OF muxdff IS
COMPONENT dff
PORT(clk : IN STD_LOGIC;
q : OUT STD_LOGIC);
END COMPONENT;
SIGNAL u: STD_LOGIC_VECTOR(0 TO 5);
BEGIN
dff1 : dff PORT MAP (clk,u(0));
g1: FOR i IN 1 TO 5 GENERATE
dff1 : dff PORT MAP (u(i-1),u(i));
END GENERATE;
cp<=u(5);
END mux_dff1
我用的是MAX+PLUS2软件
我在编译时出现了几个错误是：
Node'dff1.D missing source
等，请哪位高手看以下这个程序，谢谢！作者: miaomiao41 时间: 2004-9-29 14:11
