请教9s12DG128CAN发送一直不能发送完毕问题
我调试CAN，当两个或者三个单片机都接在CAN总线上时，通信良好，没有问题，可是当我仅有一个单片机时，同样的程序，就不行了，总是停留在while ((CAN0TFLG & txbuffer) != txbuffer);跳不出这个循环，不知道，为什么，但是用示波器发现，canh和canl也重复的发送一样的数据，示波器检测can0tx和can0rx也全部都有信号，好像发送缓存器不会为空。很怪啊，请求帮助，谢谢！
void initialcan(void) {
CAN0CTL0 = 0x01; /* Enter Initialization Mode
*
* 0b00000001
* ||||||||__ Enter Initialization Mode
* |||||||___ Sleep Mode Request bit
* ||||||____ Wake-Up disabled
* |||||_____ Time stamping disabled
* ||||______ Synchronized Status
* |||_______ CAN not affected by Wait
* ||________ Receiver Active Status bit
* |_________ Received Frame Flag bit
*/
while(CAN0CTL1_INITAK!=1); /* Wait for Initialization Mode acknowledge
* INITRQ bit = 1
*/
CAN0CTL1 = 0x80; /* Enable MSCAN module and not LoopBack Mode
*
* 0b10100000
* ||||||||__ Initialization Mode Acknowledge
* |||||||___ Sleep Mode Acknowledge
* ||||||____ Wake-up low-pass filter disabled
* |||||_____ Unimplemented
* ||||______ Listen Only Mode disabled
* |||_______ notLoop Back Mode enabled
* ||________ Ext Osc/Xtal as Clock Source
* |_________ MSCAN Module enabled
*/
CAN0BTR0 = 0x43; /* Synch Jump = 2 Tq clock Cycles
*
* 0b01000011
* ||||||||__
* |||||||___\
* ||||||____ |
* |||||_____ |_ CAN Clock Prescaler = 4
* ||||______ |
* |||_______ |
* ||________/
* |_________>- SJW = 2
*/
CAN0BTR1 = 0x14; /* Set Number of samples per bit, TSEG1 and TSEG2 (bit=187.5k)
*
* 0b00010100
* ||||||||__
* |||||||___|
* ||||||____|- TSEG1 = 5
* |||||_____|
* ||||______
* |||_______\_ TSEG2 = 2
* ||________/
* |_________ One sample per bit
*/
CAN0IDAC = 0x10; /* Set four 16-bit Filters
*
* 0b00010000
* ||||||||__
* |||||||___\_ Filter Hit Indicator
* ||||||____/
* |||||_____ Unimplemented
* ||||______
* |||_______>- Four 16-bit Acceptance Filters
* ||________
* |_________>- Unimplemented
*/
/* note Acceptance Filters neither Acceptance Filter is accorded with,message in receivebuffer will pass */ CAN0IDAR0 = 0; //|\ 16 bit Filter 0
CAN0IDMR0 = 0 ; //| \__ Accepts Standard Data Frame Msg
CAN0IDAR1 = 0; //| / with ID 0x100 ?
CAN0IDMR1 = 0; //|/
CAN0IDAR2 = 0; //|\ 16 bit Filter 1
CAN0IDMR2 = 0; //| \__ Accepts Standard Data Frame Msg
CAN0IDAR3 = 0; //| / with ID 0x000
CAN0IDMR3 = 0; //|/
CAN0IDAR4 = 0x84; //|\ 16 bit Filter 2
CAN0IDMR4 = 0x0f; //| \__ Accepts Standard Data Frame Msg
CAN0IDAR5 = 0x7E; //| / with ID 0x000
CAN0IDMR5 = 0x00; //|/
CAN0IDAR6 = 0; //|\ 16 bit Filter 3
CAN0IDMR6 = 0; //| \__ Accepts Standard Data Frame Msg
CAN0IDAR7 = 0; //| / with ID 0x000
CAN0IDMR7 = 0; //|/
CAN0CTL0 = 0x00; /* Exit Initialization Mode Request */
while ((CAN0CTL1&0x01) != 0){}; /* Wait for Normal Mode */
while(!(CAN0CTL0&0x10)); //note program always stop here
CAN0RFLG = 0xC3; /* Reset Receiver Flags
*
* 0b11000011
* ||||||||__ Receive Buffer Full Flag
* |||||||___ Overrun Interrupt Flag
* ||||||____
* |||||_____>- Transmitter Status Bits
* ||||______
* |||_______>- Receiver Status Bits
* ||________ CAN Status Change Interrupt Flag
* |_________ Wake-Up Interrupt Flag
*/
CAN0RIER = 0x01; /* Enable Receive Buffer Full Interrupt
*
* 0b00000001
* ||||||||__ Receive Buffer Full Int enabled
* |||||||___ Overrun Int disabled
* ||||||____
* |||||_____>- Tx Status Change disabled
* ||||______
* |||_______>- Rx Status Change disabled
* ||________ Status Change Int disabled
* |_________ Wake-Up Int disabled
*/ }
//-------------------------------sendframe-----------------------
int CAN0SendFrame(unsigned long id, unsigned char priority, unsigned char length, unsigned char *txdata ){
unsigned char index;
unsigned char txbuffer = {0};
if (!CAN0TFLG) /* Is Transmit Buffer full?? */
return 1; CAN0TBSEL = CAN0TFLG; /* Select lowest empty buffer */
txbuffer = CAN0TBSEL; /* Backup selected buffer */
/* Load Id to IDR Registers */
*((unsigned long *) ((unsigned long)(&CAN0TXIDR0)))= id;
for (index=0;index<length;index++) {
*(&CAN0TXDSR0 + index) = txdata[index]; /* Load data to Tx buffer
* Data Segment Registers
*/
} CAN0TXDLR = length; /* Set Data Length Code */
CAN0TXTBPR = priority; /* Set Priority */
CAN0TFLG = txbuffer; /* Start transmission */
while ((CAN0TFLG & txbuffer) != txbuffer); /* Wait for Transmission
* completion
*/
return 0;
} | 
YwvgZ91w.rar (220.53 KB)