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标题: [求助]falsh verigy failed 是为什么啊? [打印本页]

作者: wfmkfirst    时间: 2008-6-4 10:34     标题: [求助]falsh verigy failed 是为什么啊?

#!/bin/sh
#
# This file was automatically generated by the Nios II IDE Flash Programmer.
#
# It will be overwritten when the flash programmer options change.
#

cd D:/niosworks/hello/software/hello_led_1/Debug

# Creating .flash file for the project
"$SOPC_KIT_NIOS2/bin/elf2flash" --base=0x01800000 --end=0x1ffffff --reset=0x1800
000 --input="hello_led_1.elf" --output="cfi_flash.flash" --boot="D:/altera/71/ip
/nios2_ip/altera_nios2/boot_loader_cfi.srec"

# Programming flash with the project
"$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --base=0x01800000 --sidp=0x02003038
--id=1163126162 --timestamp=1212541811 --instance=0 "cfi_flash.flash"
Using cable "ByteBlasterII [LPT1]", device 1, instance 0x00
Resetting and pausing target processor: OK
Reading System ID at address 0x02003038: verified

: Checksumming existing contents

00000000 : Reading existing contents

Checksummed/read 128kB in 2.5s

00000000 ( 0%): Erasing

Erased 128kB in 0.6s (213.3kB/s)

00000000 ( 0%): Programming

Programmed 1KB +127KB in 3.0s (42.6KB/s)
Verify failed at offset 0
Leaving target processor paused

哪位大侠帮帮我啊!






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