Each memory compiler is a set of various, parameterized generators. The generators are:

? Layout Generator

: generates an array of custom, pitch-matched leaf cells.

? Schematic Generator & Netlister

: extracts a netlist which can be used for both LVS check and functional verification.

? Function & Timing Model Generators

: for gate level simulation, dynamic/static timing analysis and synthesis

? Symbol Generator

: for schematic capture

? Critical Path Generator & ETC

: there are many special purpose generators such as critical path generator used for both

circuit design and AC timing characterization.

所以memory compiler就是用于生成memory的生成器，这一般是生成可以综合的rtl，当然也可以是只用来仿真用的。

需要学习相关的memory硬件，数字电路设计，rtl，verilog，当然如果是高速的还和工艺有关。