求教：

请问怎么修改中断优先级，比如改模数递减中断的优先级高于输入捕捉的优先级？

我用的是S12XS系列的片子，我就以这个为例子吧，在芯片的数据手册（在Freescale官网可下载到）中，有一章讲的是中断，在寄存器部分有两个寄存器叫做中断请求配置地址寄存器（Interrupt Request Configuration Address Register (INT_CFADDR)）和中断请求配置数据寄存器（Interrupt Request Configuration Data Register (INT_CFDATA0__7)），你在中断向量表（安装Codewarrior都带的）中找到相应中断的中断向量地址，把他的地址写入INT_CFADDR（只能写0x80,0x90,0xa0,0xb0,0xc0,0xd0,0xe0,0xf0）因为INT_CFADDR只有高四位能用，比如你写0xD0（AD的中断），那么从0xD0地址开始的升序排列的连续的八个中断的优先级，就可以通过写INT_CFDATA0--7这八个寄存器的低三位来设置优先级，如果你想设置的几个中断的优先级不在一个组，我觉得可以分别设置，只要你在你想要的那个最高优先级的中断向量设置时，把它相对应的INT_CFDATA0__7中低三位写大数（小于7）就可以了。

以上评论只是我个人的看法，我也是个初学者，是从英文的资料里自己翻译的，不知道对不对，你可以再请高手看看，如果我说的对或者不对，你给我个恢复。以下是关于中断嵌套的一些英文，你也可以自己翻译，我们交流一下

Interrupt Request Configuration Data Register Select Bits — These bits determine which of the 128 configuration data registers are accessible in the 8 register window at INT_CFDATA0–7. The hexadecimal value written to this register corresponds to the upper nibble of the lower byte of the address of the vector, i.e., writing 0xE0 to this register selects the configuration data register block for the 8 interrupt vector requests starting with vector at address (vector base + 0x00E0) to be accessible as INT_CFDATA0–7.

4.3.2.4 Interrupt Request Configuration Data Registers (INT_CFDATA0–7)

The eight register window visible at addresses INT_CFDATA0–7 contains the configuration data for the
block of eight interrupt requests (out of 128) selected by the interrupt configuration address register
(INT_CFADDR) in ascending order. INT_CFDATA0 represents the interrupt configuration data register
of the vector with the lowest address in this block, while INT_CFDATA7 represents the interrupt
configuration data register of the vector with the highest address, respectively.