我还有问题请问大家，S12XS系列的单片机中断与其之前的版本比如HCS12有什么不同吗？我这有关于S12XS介绍的英文资料，但我还是不明白中断嵌套到底如何用啊？请好心人解释以下吧 Interrupt Nesting The interrupt request priority level scheme makes it possible to implement priority based interrupt request
nesting for the I bit maskable interrupt requests handled by the CPU. * I bit maskable interrupt requests can be interrupted by an interrupt request with a higher priority,
so that there can be up to seven nested I bit maskable interrupt requests at a time (refer to Figure 4-
14 for an example using up to three nested interrupt requests). I bit maskable interrupt requests cannot be interrupted by other I bit maskable interrupt requests per
default. In order to make an interrupt service routine (ISR) interruptible, the ISR must explicitly clear the
I bit in the CCR (CLI). After clearing the I bit, I bit maskable interrupt requests with higher priority can
interrupt the current ISR. An ISR of an interruptible I bit maskable interrupt request could basically look like this: * Service interrupt, e.g., clear interrupt flags, copy data, etc.
* Clear I bit in the CCR by executing the instruction CLI (thus allowing interrupt requests with
higher priority)
* Process data
* Return from interrupt by executing the instruction RTI | 
