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Nios II processor version 5.0 includes a Compact Flash controller peripheral suitable for interfacing to Compact Flash cards in True IDE mode on Nios development boards. In order for True IDE mode to operate, Compact Flash cards require that the "ATASEL_N" input be driven to ground during power-up.
The Compact Flash controller peripheral includes a configurable power register used to power-cycle Compact Flash cards in Nios II software through a MOSFET on the Nios development boards. However, in certain development boards, power to the Compact Flash card will not be turned off completely during this power-cycle operation. Because of this, the "ATASEL_N" pin may not be sampled during the power-cycle operation after FPGA configuration when this pin is driven to ground. Instead, "ATASEL_N" may be sampled by the Compact Flash card when power is first applied to the development board, when I/O are not yet driven by the FPGA (before FPGA configuration).
Workaround: If you encounter errors with Compact Flash when using the Nios development boards, please try one of the following workarounds:
Try a different Compact Flash card -- Certain cards are more susceptible to the power-cycling issue than others.
Modify the Nios development board -- This is recommended for users who are familiar and comfortable with board-level modifications. Disconnect pin 9 (ATASEL_N) on the Compact Flash socket on your Nios Development Board and tie this pin to ground. Note that the Compact Flash socket uses a staggered numbering on the pins (starting from pin 1: 1, 26, 2, 27, ...); please refer to the Compact Flash Association specification for right-angle surface-mount connectors for exact specifications on this connector. Caution: This will permanently enable True-IDE mode operation.
[此贴子已经被作者于2005-8-28 15:53:37编辑过] |