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FPGA/CPLD可编程逻辑

[ 26527 主题 / 25683 回复 ]

版块介绍: 讨论关于FPGA和CPLD的相关话题!

版主: boyfly, stone133, flanix, bydxdtcdj, 电子狂热, xcx_hust, benbenfei, AndyLee008

FPGA/CPLD可编程逻辑

    标题 作者 回复/查看 最后发表
common   什么是CPLD look_w 2017-11-16 0/329 look_w 2017-11-16 12:15
common   Verilog中 reg和wire 用法和区别以及always和assign的区别 look_w 2017-11-16 0/318 look_w 2017-11-16 12:13
common   ARM+FPGA如何入门,如何学习入门嵌入式 look_w 2017-11-16 0/378 look_w 2017-11-16 12:11
common   FPGA和CPLD对比与入门 look_w 2017-11-16 0/333 look_w 2017-11-16 12:10
common   FPGA和CPLD的区别 look_w 2017-11-16 0/356 look_w 2017-11-16 12:08
common   FPGA之学习FPGA需要注意的地方 look_w 2017-11-7 0/443 look_w 2017-11-7 16:57
common   FPGA之ZedBoard入门 look_w 2017-11-7 0/414 look_w 2017-11-7 16:56
common   FPGA开发之Tcl的基于项目设计 look_w 2017-11-7 0/461 look_w 2017-11-7 16:54
common   FPGA开发之eCos系统 look_w 2017-11-7 0/421 look_w 2017-11-7 16:52
common   FPGA开发之问题二 look_w 2017-11-7 0/444 look_w 2017-11-7 16:50
common   FPGA开发之问题一 look_w 2017-11-7 0/423 look_w 2017-11-7 16:48
common   FPGA开发之控制集control sets look_w 2017-11-7 0/384 look_w 2017-11-7 16:47
common   FPGA之新套件Vivado的新性能 look_w 2017-11-7 0/424 look_w 2017-11-7 16:47
common   FPGA开发之时钟管理模块 look_w 2017-11-7 0/323 look_w 2017-11-7 16:46
common   FPGA开发之时序约束(周期约束) look_w 2017-11-7 0/424 look_w 2017-11-7 16:44
common   FPGA开发之引脚和区域约束语法 look_w 2017-11-7 0/409 look_w 2017-11-7 16:43
common   FPGA开发之planahead look_w 2017-11-7 0/407 look_w 2017-11-7 16:42
common   FPGA开发流程1(详述每一环节的物理含义和实现目标F) look_w 2017-11-4 0/346 look_w 2017-11-4 13:42
common   FPGA开发流程1(详述每一环节的物理含义和实现目标E) look_w 2017-11-4 0/577 look_w 2017-11-4 13:40
common   FPGA开发流程1(详述每一环节的物理含义和实现目标D) look_w 2017-11-4 0/397 look_w 2017-11-4 13:39
common   FPGA开发流程1(详述每一环节的物理含义和实现目标C) look_w 2017-11-4 0/455 look_w 2017-11-4 13:38
common   FPGA开发流程1(详述每一环节的物理含义和实现目标B) look_w 2017-11-4 0/416 look_w 2017-11-4 13:37
common   FPGA开发流程1(详述每一环节的物理含义和实现目标A) look_w 2017-11-4 0/462 look_w 2017-11-4 13:35
common   FPGA开发管理0(FPGA开发基本流程及注意事项) look_w 2017-11-4 0/415 look_w 2017-11-4 13:34
common   Lattice系列FPGA入门相关9(人眼分辨帧数) look_w 2017-11-4 0/497 look_w 2017-11-4 13:32
common   Lattice系列FPGA入门相关8(理解SerDes之7) look_w 2017-11-4 0/485 look_w 2017-11-4 13:31
common   Lattice系列FPGA入门相关8(理解SerDes之6) look_w 2017-11-4 0/462 look_w 2017-11-4 13:30
common   Lattice系列FPGA入门相关8(理解SerDes之5) look_w 2017-11-4 0/402 look_w 2017-11-4 13:28
common   Lattice系列FPGA入门相关7(理解SerDes之4) look_w 2017-11-4 0/484 look_w 2017-11-4 13:27
common   Lattice系列FPGA入门相关7(理解SerDes之3) look_w 2017-11-4 0/427 look_w 2017-11-4 13:25
common   Lattice系列FPGA入门相关6(理解SerDes之2) look_w 2017-11-4 0/537 look_w 2017-11-4 13:24
common   Lattice系列FPGA入门相关6(理解SerDes之1) look_w 2017-11-4 0/491 look_w 2017-11-4 13:23
common   Lattice系列FPGA入门相关5(FPGA查找表结构和乘积项结构) look_w 2017-11-4 0/469 look_w 2017-11-4 13:20
common   Lattice系列FPGA入门相关4(FPGA 扇入扇出 ) look_w 2017-11-4 0/373 look_w 2017-11-4 13:18
common   Lattice系列FPGA入门相关3(FPGA选型策略--强烈赞同) look_w 2017-11-4 0/347 look_w 2017-11-4 13:17
common   Lattice系列FPGA入门相关2(FPGA和CPLD的区别) look_w 2017-11-4 0/385 look_w 2017-11-4 13:16
common   Lattice系列FPGA入门相关1(Lattice系列FPGA简介) look_w 2017-11-4 0/413 look_w 2017-11-4 13:15
common   Lattice系列FPGA入门相关0(Lattice与Altera、Xilinx对比及入门) look_w 2017-11-4 0/491 look_w 2017-11-4 13:13
common   FPGA基础知识4(FPGA DCM时钟管理单元的理解--BUFG SKEW) look_w 2017-11-4 0/406 look_w 2017-11-4 13:02
common   FPGA基础知识3(xilinx CLB资源详解--slice、分布式RAM和Block ram) look_w 2017-11-4 0/471 look_w 2017-11-4 13:01
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