
- UID
- 83382
- 性别
- 男
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UTStarcom (Beijing Advanced Technology Lab)
- Full-time job
- Location: Beijing
FPGA Digital Engineer
Responsibility: DSP algorithm implementation on FPGA
(1)BS or MS or PhD in EE, CS or automatic control
(2)FPGA design, modeling, and testing experience using Verilog or VHDL on Xilinx, Altera FPGAs
(3)In depth understanding of FPGA architecture, digital circuits, and general purpose DSPs
(4)Working knowledge of communication theory and DSP algorithms
(5)Prior knowledge of C/C++/Matlab an definite plus
Please send your resume to zqlx@hotmail.com |
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