xilinx内嵌EMAC硬核的使用问题 ERROR, 以太网

wangyy_mwtl

本人用Virtex-5的内置以太网硬核时在程序编译的时候显示
ERROR:HDLCompilers:91 - "top.v" line 208 Module 'mymac_block' does not have a port named 'TX_CLIENT_CLK_OUT_0'
ERROR:HDLCompilers:91 - "top.v" line 209 Module 'mymac_block' does not have a port named 'RX_CLIENT_CLK_OUT_0'
ERROR:HDLCompilers:91 - "top.v" line 210 Module 'mymac_block' does not have a port named 'TX_PHY_CLK_OUT_0'
ERROR:HDLCompilers:91 - "top.v" line 211 Module 'mymac_block' does not have a port named 'TX_CLIENT_CLK_0'
ERROR:HDLCompilers:91 - "top.v" line 212 Module 'mymac_block' does not have a port named 'RX_CLIENT_CLK_0'
ERROR:HDLCompilers:91 - "top.v" line 213 Module 'mymac_block' does not have a port named 'TX_PHY_CLK_0'
-------这些端口明明存在，怎么会报错不存在呢？？？
请各位赐教