always @(posedge clock)
begin
count=count+1;
if (count[15:6] < pwm_count)
pwm_reg=1;
else
pwm_reg=0;
end
always @(posedge count[15])
begin
if (keyin[0] == 1'b0)
begin
pwm_count=pwm_count+1;
end
else if (keyin[1] == 1'b0)
begin
pwm_count=pwm_count-1;
end
end