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- UID
- 75476
- 性别
- 男
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library IEEE;
use IEEE.Std_logic_1164.all;
entity HCT245 is
port(A, B : inout std_logic_vector(7 downto 0);
DIR, GBAR : in std_logic);
end HCT245;
architecture VER1 of HCT245 is
begin
A <= B when (GBAR = '0') and (DIR = '0') else (others => 'Z');
B <= A when (GBAR = '0') and (DIR = '1') else (others => 'Z');
end VER1;
语法没有任何问题,但在波形仿真时令人费解,望大家不吝赐教 |
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