*******************************************************************************/
void RCC_PCLK1Config(u32 RCC_HCLK)
{
u32 tmpreg = 0; /* Check the parameters */
assert_param(IS_RCC_PCLK(RCC_HCLK));
tmpreg = RCC->CFGR;
/* Clear PPRE1[2:0] bits */
tmpreg &= CFGR_PPRE1_Reset_Mask;
/* Set PPRE1[2:0] bits according to RCC_HCLK value */
tmpreg |= RCC_HCLK;
/* Store the new value */
RCC->CFGR = tmpreg;
}
/*******************************************************************************
* Function Name : RCC_PCLK2Config
* Description : Configures the High Speed APB clock (PCLK2).
* Input : - RCC_HCLK: defines the APB2 clock divider. This clock is
* derived from the AHB clock (HCLK).
* This parameter can be one of the following values:
* - RCC_HCLK_Div1: APB2 clock = HCLK
* - RCC_HCLK_Div2: APB2 clock = HCLK/2
* - RCC_HCLK_Div4: APB2 clock = HCLK/4
* - RCC_HCLK_Div8: APB2 clock = HCLK/8
* - RCC_HCLK_Div16: APB2 clock = HCLK/16
* Output : None
* Return : None
* 功能 : 设置高速AHB时钟（PCLK2）；
*******************************************************************************/
void RCC_PCLK2Config(u32 RCC_HCLK)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_RCC_PCLK(RCC_HCLK));
tmpreg = RCC->CFGR;
/* Clear PPRE2[2:0] bits */
tmpreg &= CFGR_PPRE2_Reset_Mask;
/* Set PPRE2[2:0] bits according to RCC_HCLK value */
tmpreg |= RCC_HCLK << 3;
/* Store the new value */
RCC->CFGR = tmpreg;
}
/*******************************************************************************
* Function Name : RCC_APB2PeriphClockCmd
* Description : Enables or disables the High Speed APB (APB2) peripheral clock.
* Input : - RCC_APB2Periph: specifies the APB2 peripheral to gates its
* clock.
* This parameter can be any combination of the following values:
* - RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB,
* RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE,
* RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1,
* RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1,
* RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3,
* RCC_APB2Periph_ALL
* - NewState: new state of the specified peripheral clock.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
* 功能 : 使能或者失能APB2外设时钟 ；
*******************************************************************************/
void RCC_APB2PeriphClockCmd(u32 RCC_APB2Periph, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
RCC->APB2ENR |= RCC_APB2Periph;
}
else
{
RCC->APB2ENR &= ~RCC_APB2Periph;
}
} |
