使用STM32 Timer的Gate模式来精确控制脉冲个数（2） between, control, master, Create

yuyang911220

/*0085*/    /* Create relationship between timer1 and timer3, timer3 is master, timer1 is slave
|*0086*|      timer1 is work under gate control mode, and controled by timer3
|*0087*|      timer3's channel 4 is used as the control signal
|*0088*|     */
/*0089*/      /* Enable timer's master/slave work mode */
/*0090*/      TIM_SelectMasterSlaveMode(TIM3,TIM_MasterSlaveMode_Enable);
/*0091*/      TIM_SelectMasterSlaveMode(TIM1,TIM_MasterSlaveMode_Enable);
/*0092*/      /* timer3's channel 4 is used as the control signal */
/*0093*/      TIM_SelectOutputTrigger(TIM3,TIM_TRGOSource_OC4Ref );
/*0094*/      /* Check the master/slave is valid or not */
/*0095*/      compile_assert((u16)GetInternalTrigger(TIM1,TIM3) != (u16)-1);  
/*0096*/      /* Config timer1's external clock */
/*0097*/      TIM_ITRxExternalClockConfig(TIM1, GetInternalTrigger(TIM1,TIM3));
/*0098*/      TIM_SelectSlaveMode(TIM1,TIM_SlaveMode_Gated);
/*0099*/       
/*0100*/    /* Enable the slave tiemr*/
/*0101*/    TIM_Cmd(TIM1,ENABLE);
/*0102*/    //SetupAlltimers();
/*0103*/    while(1){
/*0104*/      /* Check whether the previous action is done or not */
/*0105*/      if(!(TIM3->CR1 & 1)){
/*0106*/        TIM1->CNT = 0; /* It would be very perfect if gate mode can  
|*0107*|                          reset the slave timer automatically */
/*0108*/        TIM3->ARR = waveNumber*2;  /* Reload wave number*/
/*0109*/        TIM3->CCR4 = waveNumber*2 - 1;
/*0110*/        TIM3->CR1|=1; /* Re-enable the timer */
/*0111*/        /* update waveform number */
/*0112*/        waveNumber++;
/*0113*/        if(waveNumber == 13){
/*0114*/          waveNumber = 10;
/*0115*/        }
/*0116*/      }
/*0117*/    }
/*0118*/  }
/*0119*/  
/*0120*/  /*******************************************************************************
|*0121*|  * Function Name  : RCC_Configuration
|*0122*|  * Description    : Configures the different system clocks.
|*0123*|  * Input          : None
|*0124*|  * Output         : None
|*0125*|  * Return         : None
|*0126*|  *******************************************************************************/
/*0127*/  void RCC_Configuration(void)
/*0128*/  {
/*0129*/    /* RCC system reset(for debug purpose) */
/*0130*/    RCC_DeInit();
/*0131*/  
/*0132*/    /* Enable HSE */
/*0133*/    RCC_HSEConfig(RCC_HSE_ON);
/*0134*/  
/*0135*/    /* Wait till HSE is ready */
/*0136*/    HSEStartUpStatus = RCC_WaitForHSEStartUp();
/*0137*/  
/*0138*/    if(HSEStartUpStatus == SUCCESS)
/*0139*/    {
/*0140*/      /* Enable Prefetch Buffer */
/*0141*/      FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/*0142*/  
/*0143*/      /* Flash 2 wait state */
/*0144*/      FLASH_SetLatency(FLASH_Latency_2);
/*0145*/    
/*0146*/      /* HCLK = SYSCLK */
/*0147*/      RCC_HCLKConfig(RCC_SYSCLK_Div1);  
/*0148*/     
/*0149*/      /* PCLK2 = HCLK */
/*0150*/      RCC_PCLK2Config(RCC_HCLK_Div1);  
/*0151*/  
/*0152*/      /* PCLK1 = HCLK/2 */
/*0153*/      RCC_PCLK1Config(RCC_HCLK_Div2);
/*0154*/  
/*0155*/      /* PLLCLK = 8MHz * 9 = 72 MHz */
/*0156*/      RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/*0157*/  
/*0158*/      /* Enable PLL */  
/*0159*/      RCC_PLLCmd(ENABLE);
/*0160*/  
/*0161*/      /* Wait till PLL is ready */
/*0162*/      while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
/*0163*/      {
/*0164*/      }
/*0165*/  
/*0166*/      /* Select PLL as system clock source */
/*0167*/      RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/*0168*/  
/*0169*/      /* Wait till PLL is used as system clock source */
/*0170*/      while(RCC_GetSYSCLKSource() != 0x08)
/*0171*/      {
/*0172*/      }
/*0173*/    }
/*0174*/  }