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- UID
- 159029
- 性别
- 男
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由于7.1下找不到做目标板,直接加入CFI,但是CPU中没有从Flash启动的选项.于是装了5.1,结果5.1用mk_target_board命令时出错,只好装5.0,做了目标板,引脚连接按电路板实际情况连,我的Flash是AM29LV800,OE接读,CE接CS,BYTE,RY/BY,RESET接高电平,19根地址线接地址1到19,0空着.数据线对应接.编译时,出来WARNING: Default charset GBK not supported, using ISO-8859-1 instead的警告,不知如何消除,于是打开Flash下载,结果如下:
#! /bin/sh
#
# This file was automatically generated by the Nios II IDE Flash Programmer.
#
# It will be overwritten when the flash programmer options change.
#
cd F:/hellousb/Debug
# Creating .flash file for the FPGA configuration
$SOPC_KIT_NIOS2/bin/sof2flash --flash=U10 --offset=0x00000000 --epcs --input=F:/
IDEusb/IDEproc.sof --output=IDEproc.flash
Info: *******************************************************************
Info: Running Quartus II Convert_programming_file
Info: Command: quartus_cpf --no_banner --convert --device=EPCS64 --option=IDEpro
c.opt F:/IDEusb/IDEproc.sof IDEproc.pof
Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings
Info: Processing ended: Tue Nov 27 23:00:57 2007
Info: Elapsed time: 00:00:05
Info: *******************************************************************
Info: Running Quartus II Convert_programming_file
Info: Command: quartus_cpf --no_banner --convert IDEproc.pof IDEproc.rpd
Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings
Info: Processing ended: Tue Nov 27 23:01:01 2007
Info: Elapsed time: 00:00:04
WARNING: Default charset GBK not supported, using ISO-8859-1 instead
# Programming flash with the FPGA configuration
$SOPC_KIT_NIOS2/bin/nios2-flash-programmer --input=IDEproc.flash --sof=$SOPC_KIT
_NIOS2/examples/HD_Flash/system/HD_Flash.sof --epcs
Nov 27, 2007 11:01:02 PM - (??) nios2-flash-programmer: Launching Quartus Progra
mmer to download:
d:/altera50/kits/nios2_51/examples/HD_Flash/system/HD_Flash.sof
Pre-Reading 119KBytes of data from U10:
│----.----+----.----│
********************* (38.687 sec).
Erasing 2 Sectors:
│----.----+----.----│
********************* (2.0 sec).
Writing 128KBytes :
│----.----+----.----│
********************* (25.891 sec).
Verifying 128KBytes of data:
│----.----+----.----│
********************* (25.968 sec).
Nov 27, 2007 11:02:47 PM - (??) nios2-flash-programmer: Success. Verified 128Kby
tes written to U10.
Nov 27, 2007 11:02:47 PM - (??) nios2-flash-programmer: Flash programming comple
te
WARNING: Default charset GBK not supported, using ISO-8859-1 instead
# Creating .flash file for the project
$SOPC_KIT_NIOS2/bin/elf2flash --flash=U7 --base=0x00100000 --end=0x17ffff --rese
t=0x100000 --input=hellousb.elf --output=cfi_flash_0.flash --boot=$SOPC_KIT_NIOS
2/components/altera_nios2/boot_loader_cfi.srec
WARNING: Default charset GBK not supported, using ISO-8859-1 instead
# Programming flash with the project
$SOPC_KIT_NIOS2/bin/nios2-flash-programmer --input=cfi_flash_0.flash --sof=__NO_
SOF_PLEASE__ --base=0x00100000
Nov 27, 2007 11:02:49 PM - (??) nios2-flash-programmer: SOF-download skipped.
Nov 27, 2007 11:02:52 PM - (??) nios2-flash-programmer: Error opening target har
dware
Nov 27, 2007 11:02:52 PM - (??) nios2-flash-programmer: Unable to open flash-
device after successfully communicating
with target.
It is likely that you are using a flash-programming FPGA design which
was not created for your target board.
In order to program flash, you must first create a purpose-built
flash-programming design (i.e. FPGA configuration) and associate it with
your particular board. The Nios development kit is delivered with purpose-bui
lt
flash-programming designs pre-built for several development boards. If you wi
sh
to program flash on your own board, you must first create a flash-programming
design.
The process of creating a flash-programming design for your board is mostly
automated. From a bash-shell, execute this script:
mk_target_board --help
The help-message includes references to other documentation on programming
flash and targeting Nios systems to custom board designs.
- exiting.
WARNING: Default charset GBK not supported, using ISO-8859-1 instead
看这信息,把目标板的.sof文件已经下载到U10,也就是EPCS4,但是程序文件未能写到Flash,检查了硬件连接供电正常,管脚连接定义也没问题,不知这是什么原因?请大家指导
It is likely that you are using a flash-programming FPGA design which
was not created for your target board.
这段意为不能为未建立目标板的项目上进行flash下载,但我确实时建立并生成了,而且在做测试时,能找到这个目标板选项并选择了这个目标板
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