请教-关于vhdl定义package中的procedure问题...
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- UID
- 82666
- 性别
- 男
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- UID
- 82666
- 性别
- 男
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请教-关于vhdl定义package中的procedure问题...
| 定义package:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
PACKAGE cpac IS
PROCEDURE shift_1(
din:IN STD_LOGIC_VECTOR;
s:IN STD_LOGIC_VECTOR;
SIGNAL dout:OUT STD_LOGIC_VECTOR);
END cpac;
PACKAGE BODY cpac IS
PROCEDURE shift_1(
din:IN STD_LOGIC_VECTOR;
s:IN STD_LOGIC_VECTOR;
SIGNAL dout:OUT STD_LOGIC_VECTOR) IS
VARIABLE sc:INTEGER;
BEGIN
sc:=CONV_INTEGER(s);
FOR i IN din'RANGE LOOP
IF(sc+i<=din'LEFT)THEN
dout(sc+i)<=din(i);
ELSE
dout(sc+i-1-din'LEFT)<=din(i);
END IF;
END LOOP;
END shift_1;
END cpac;
实体定义：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE WORK.cpac.ALL;
ENTITY bsr IS
--GENERIC(SIZE:INTEGER:=8);
PORT(din:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s:IN STD_LOGIC_VECTOR(2 DOWNTO 0);
clk,enb:IN STD_LOGIC;
dout:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END bsr;
ARCHITECTURE rtl OF bsr IS
BEGIN
PROCESS(clk)
BEGIN
IF(clk'EVENT AND clk='1')THEN
IF(enb='0')THEN
dout<=din;
ELSE
shift_1(din,s,dout);--------调用有问题吗？
END IF;
END IF;
END PROCESS;
END rtl;
在这个程序中muxplus2-10.0报的错是：
SIGNAL PARAMETER IN A SUBPROGRAM IS NOT SUPORTED
[此贴子已经被作者于2004-3-25 9:42:58编辑过] |
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- UID
- 171497
- 性别
- 男
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| 请问用什么编译器的？我在quartus 6.0下编译通过了[em07] |
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