基于uClinux内核移植ARM开发板应用（2） Memory, Flash, 开发

yuyang911220

如果在Bootloader执行的全过程中都不必响应中断，那么上面的设置已能满足要求。但在我们的
ARMSYS上提供了USB下载器，需要用到中断，那么Bootloader必须在同样的地址（0xc000000）处配置自己的二级异常中断矢量表，以便同uClinux兼容。这张表事先存放在
Flash Memory里，引导过程中由Bootloader将其复制到RAM地址0x0C000000：
存放矢量表：
;IRQ ==the program put this phrase to 0xc000000
ExceptionHanlderBegin
b .
ldr pc, MyHandleUndef ; HandlerUndef
ldr
pc, MyHandleSWI ; HandlerSWI
ldr pc, MyHandlePabort ; HandlerPabort
ldr
pc, MyHandleDabort ; HandlerDAbort
b . ; HandlerReserved
ldr pc,
MyHandleIRQ ; HandlerIRQ
ldr pc, MyHandleFIQ ; HandlerFIQ
MyHandleUndef DCD HandleUndef ;reserve a word(32bit)
MyHandleSWI DCD
HandleSWI
MyHandlePabort DCD HandlePabort
MyHandleDabort DCD
HandleDabort
MyHandleIRQ DCD HandleIRQ
MyHandleFIQ DCD HandleFIQ
ExceptionHanlderEnd
建立二级矢量表：
;****************************************************
;* Setup IRQ handler
*
;****************************************************
ldr
r0,=(_IRQ_BASEADDRESS＋0x100)
ldr r2,=_IRQ_BASEADDRESS
add r3,r0,
#0x100
0
CMP r0, r3
STRCC r2, [r0], #4;cc:Carry clear;save R2 to R0
address, R0 =R0+ 4。
BCC %B0
ldr r1,=_IRQ_BASEADDRESS
ldr r0,=ExceptionHanlderBegin ;if there isn＇t
＇subs pc,lr,#4＇ at 0x18, 0x1c
ldr r3,=ExceptionHanlderEnd
0
CMP r0, r3
;put the vector table at _IRQ_BASEADDRESS(0xc000000)
LDRCC r2, [r0],
#4
STRCC r2, [r1], #4
BCC %B0
ldr r1,=DIsrIRQ;put the IRQ judge program at
_IRQ_BASEADDRESS+0x80(0xc000080)
ldr r0,=IsrIRQ ;if there isn＇t＇subs
pc,lr,#4＇ at 0x18, 0x1c
ldr r3,=IsrIRQEnd
0
CMP r0, r3
LDRCC r2,
[r0], #4
STRCC r2, [r1], #4
BCC %B0
ldr r1, =MyHandleIRQ ;MyHandleIRQ point to DIsrIRQ
ldr r0,
=ExceptionHanlderBegin
ldr r4, =_IRQ_BASEADDRESS;
sub r0, r1, r0
add
r0, r0,r4
ldr r1, =DIsrIRQ
str r1, [r0]
定义Handlexxx：
^ (_IRQ_BASEADDRESS)
HandleReset # 4
HandleUndef # 4
HandleSWI #
4
HandlePabort # 4
HandleDabort # 4
HandleReserved # 4
HandleIRQ #
4
HandleFIQ # 4
^ (_IRQ_BASEADDRESS+0x80)
DIsrIRQ # 4
;IntVectorTable
^
(_IRQ_BASEADDRESS+0x100)
HandleADC # 4
HandleRTC # 4
HandleUTXD1 #
4
HandleUTXD0 # 4
HandleSIO # 4
HandleIIC # 4
HandleURXD1 #
4
HandleURXD0 # 4
HandleTIMER5 # 4
HandleTIMER4 # 4
HandleTIMER3 #
4
HandleTIMER2 # 4
HandleTIMER1 # 4
HandleTIMER0 # 4
HandleUERR01 #
4
HandleWDT # 4
HandleBDMA1 # 4
HandleBDMA0 # 4
HandleZDMA1 #
4
HandleZDMA0 # 4
HandleTICK # 4
HandleEINT4567 # 4
HandleEINT3 #
4
HandleEINT2 # 4
HandleEINT1 # 4
HandleEINT0 # 4