-- WARNING: Do NOT edit the input and output ports in this file in a text
-- editor if you plan to continue editing the block that represents it in
-- the Block Editor! File corruption is VERY likely to occur. -- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
-- Generated by Quartus II Version 5.1 (Build Build 176 10/26/2005)
-- Created on Fri Jan 12 21:32:18 2007
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all; -- Entity Declaration ENTITY ag IS
-- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
 ORT
(
clk : IN STD_LOGIC;
rest : IN STD_LOGIC;
start : IN STD_LOGIC;
a : IN STD_LOGIC;
b : IN STD_LOGIC;
aout : OUT STD_LOGIC_VECTOR(7 downto 0);
bout : OUT STD_LOGIC_VECTOR(7 downto 0)
);
-- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
END ag;
-- Architecture Body
ARCHITECTURE ag_architecture OF ag IS
BEGIN
process(rest,clk)
variable counta,countax,countb,countbx:std_logic_vector(3 downto 0);
variable en:std_logic;
begin
if(rest='0')then
en:='0';
counta:="0000";
countax:="0000";
countb:="0000";
countbx:="0000";
aout<=(others=>'0');
bout<=(others=>'0');
elsif(clk'event and clk='1')then
if(start='0')then
en:='1';
elsif(en='1')then
if(a='0' or b='0')then
if(a='0')then
if(counta="1001")then
countax:=countax+1;
counta:="0000";
else
counta:=counta+1;
end if;
else
if(countb="1001")then
countbx:=countbx+1;
countb:="0000";
else
countb:=countb+1;
end if;
end if;
en:='0';
aout(7 downto 4)<=countax;
aout(3 downto 0)<=counta;
bout(7 downto 4)<=countbx;
bout(3 downto 0)<=countb;
end if;
end if;
end if;
end process;
END ag_architecture;
没有加去抖动，功能仿真过了，你看看行不行。见笑了 | 
