大家看看我得这个RAM程序，我用RAM_STYPE进行了约束，按理说，应该在综合时使用block ram才对，但是综合报告中却没有用block ram，这是为什么？
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ram is
Port ( addra : in STD_LOGIC_VECTOR(8 downto 0);
addrb : in STD_LOGIC_VECTOR(8 downto 0);
clka : in std_logic;
clkb : in std_logic;
dina : in STD_LOGIC_VECTOR(10 downto 0);
doutb : out STD_LOGIC_VECTOR(10 downto 0);
ena : in std_logic;
enb : in std_logic;
wea : in std_logic);
attribute ram_stype :string;
attribute ram_stype of ram: entity is "block";
end ram;
architecture Behavioral of ram is
TYPE Blram IS ARRAY(0 to 512) OF STD_LOGIC_VECTOR(10 DOWNTO 0);
SIGNAL mm:Blram;
begin
p1:process(clka,ena,wea)
begin
if (ena='1' and wea='1') then
if rising_edge(clka) then
mm(conv_integer(addra))<= dina;
end if;
end if;
end process p1;
p2:process(clkb,enb)
begin
if (enb='1') then
if rising_edge(clkb) then
doutb <= mm(conv_integer(addrb));
end if;
end if;
end process p2;
end Behavioral;
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