原理图是不支持生成期望的仿真的。"Generate Expected Simulation Results" is only there for HDL Bencher to write out a self-checking testbench. In most cases, this is not needed, but if necessary you can work around this currently by creating your own HDL testbench.
XILINX网上有说明的 http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&getPagePath=20740 |
