| LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_arith.ALL;
ENTITY Cnt10b IS
PORT (clk: IN STD_LOGIC;
q: OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
END Cnt10b??;
ARCHITECTURE one OF Cnt10b IS
SIGNAL qout:STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
IF clk'EVENT AND clk??=??'1' THEN
IF qout="1001" THEN qou t<= "0000";
END?? IF??;
END IF;
q<=qout;
END PROCESS;
END one; 保存的文件名和实体的名字要一致。 |
