小弟是新手！ 最近有个设计用到了很多的时钟其中有从dcm上分出来的，还有就是我用计数器搭出来的时钟！ 在综合与实现都成功，但是在生成编程文件的时候总是报错。 错误信息如下 Automatic clock placement failed. Please attempt to analyze the global clocking required for this
design and either lock the clock placement or area locate the logic driven by the clocks so that that the clocks may
be placed in such a way that all logic driven by them may be routed. The main restriction on clock placement is that
only one clock output signal for any competing Global / Side pair of clocks may enter any region. For further
information see the "Quadrant Clock Routing" section in the Spartan3e Family Datasheet 在我的设计当中有的模块我用自己写的程序生成，其中用到了两个时钟工作！根据上面的错误信息应该是时钟的分配上的问题！ 谁能帮下忙，帮小弟分析一下！ | 
