用Verilog HDL编写如下代码:
module relay(LED0,LED1);
output LED0;
output LED1;
assign LED0=1;
assign LED1=0;
endmodule
综合下载到XC9572后,LED0,LED1端口的LED都亮,测电压为三点几伏.
仿真结果正确,管脚对应关系也正确,.UCF文件如下:
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "LED0" LOC = "P68" ;
NET "LED1" LOC = "P70" ;
#PACE: Start of PACE Area Constraints
#PACE: Start of PACE Prohibit Constraints
#PACE: End of Constraints generated by PACE #PINLOCK_BEGIN
68脚,70脚分别通过一电阻接LED然后接地.
不知道两LED怎么都亮,请高手指点. | 
