请高手帮忙，我用Verilog写了一个LCD的驱动，用状态机写的，但编译的时候有很多警告。请高手指点，初学中。。。所有变量都定义为reg always @(posedge clkdiv,negedge reset)
begin
if(!reset)
current_state<=st0;
else
current_state<=next_state;
end always @(current_state,lcd_busy)
begin
case(current_state)
st0: //initial
begin lcd_req=1'b0;
cnt_a=2'b00;
cnt_d=2'b00;
addr_a=5'd0;
addr_d=6'd0;
data_all=0;
f0=1'b0;
next_state<=st1;
end
st1:
begin
next_state<=st2;
end
st2: //LCD is busy? yes wait.else put the data on the data_bus
begin
if(lcd_busy==1'b1)
next_state<=st2;
else
next_state<=st3;
end
st3:
begin
if(!f0) //writing f0
begin
lcd_data=8'hf0;
f0=1'b1;
next_state<=st6;
end
else
begin
next_state<=st4;
end
end
st4://write x\y axis
begin
if(cnt_a<2'd2)
begin
lcd_data=axis(addr_a);
addr_a=addr_a+5'd1;
cnt_a=cnt_a+2'd1;
next_state<=st6;
end
else
next_state<=st5;
end
st5: //write data
begin
if(cnt_d<2'd2)
begin
lcd_data<=data_ram(addr_d);
addr_d=addr_d+6'd1;
cnt_d=cnt_d+2'd1;
end
else //finishing writing one chinese word
begin
data_all=data_all+1;
cnt_d=2'd0;
cnt_a=2'd0;
f0=1'b0;
end
next_state<=st6;
end
st6: //request LCD processing
begin lcd_rea=1'b1;
next_state<=st7;
end
st7: //waiting data is dealt with
begin
if(lcd_busy==1'b0)
next_state<=st7;
else
next_state<=st8;
end
st8: //withdrawing requesting_signal
begin
if(data_all<DANUM) //write next data
next_state<=st2;
else
next_state<=st0;
end
default:
next_state<=st0;
endcase end 整个程序的任务是完成LCD显示汉字，为了显示汉字要先向LCD里写F0，X、Y坐标，最后送入汉字的区码、位码。每次向LCD发送写指令时要先判断LCD是否忙（lcd_busy==1?)不忙时（lcd_busy==0)将数据送到数据线上，下一步是请求LCD处理（令lcd_req=1)，再次判断（lcd_busy==1?)如果是则表明LCD处于数据处理状态此时可令lcd_req=0，以撤消请求。这样就完成了一次LCD数据写操作。 我在学程序的时候严格按照步骤来的，但编译出来总是提示好多错误，并且仿真得不到结果，像提示 cnt_a，cnt_d
addr_a，addr_d，data_all，f0这些变量有不安全行为，并产生了Latch，还说在Always里面读了但没放到信号列表里，还有通过很多的途径张变了这些变量的值。 希望哪位高人能提出些建议，先谢谢各位！ | 
