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大家看一下怎么回事 哪位高手指点一次啊!!!

大家看一下怎么回事 哪位高手指点一次啊!!!

我在设计 中 分成两个元件 对两个元件编程仿真 均成功 而且连警告都没有  可是 把两个元件连接起来就不行了
出现了:
Mapping a total of 106 equations into 8 function blocks...................................................................................................................................................................................................................................................................................ERROR:Cpld:892 - Cannot place signal XLXI_1/cnt<1>. Consider reducing the
ERROR:Cpld:868 - Cannot fit the design into any of the specified devices with
ERROR: Fit failed

其中XLXI_1 是用于两个元件相连的信号 怎么回事 元件例化就是不对!!!!


详尽情况:


Started process "Fit".

Release 7.1.04i - CPLD Optimizer/Partitioner H.42
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.
Considering device XC95144XL-10-TQ144.
Flattening design..
Multi-level logic optimization...
Timing optimization....................................................................................................................................................................................................................................................................
Timing driven global resource optimization
General global resource optimization........
Re-checking device resources ...
Mapping a total of 106 equations into 8 function blocks...................................................................................................................................................................................................................................................................................ERROR:Cpld:892 - Cannot place signal XLXI_1/cnt<1>. Consider reducing the
   collapsing input limit or the product term limit to prevent the fitter from
   creating high input and/or high product term functions.
.
ERROR:Cpld:868 - Cannot fit the design into any of the specified devices with
   the selected implementation options.
ERROR: Fit failed
Reason:

Started process "Generate HTML report".

Release 7.1.04i - CPLD HTML Report Processor H.42
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

Process "Fit" did not complete.


FIT 老也不成功 呀 真的不知道怎么办了 求教!!!!!!!!!!1

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