| 我的程序是用maxplus2编译的，用vhdl进行编写，可是遇到高阻的问题，怎么也编译不过，希望大家指教
以下是源程序：
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
ENTITY control1 IS
PORT
( clk : IN STD_LOGIC;
cntx : IN INTEGER RANGE 0 TO 9999;
cnty : IN INTEGER RANGE 0 TO 99;
ensure : IN STD_LOGIC;
io : OUT STD_LOGIC_VECTOR(29 DOWNTO 0)
);
END ;
ARCHITECTURE arc OF control1 IS
signal sure :STD_LOGIC;
--signal n: INTEGER RANGE 0 TO 99;
--SIGNAL TEMP:STD_LOGIC;
BEGIN
PROCESS (ensure)
BEGIN
IF (ensure'event and ensure='0') THEN
sure<= not sure;
end if;
END PROCESS;
PROCESS (clk)
variable m: INTEGER RANGE 0 TO 99;
variable t: INTEGER RANGE 0 TO 9999;
variable n: INTEGER RANGE 0 TO 99;
BEGIN
IF (clk'event and clk='0') THEN
IF (sure = '1') THEN
IF (cntx>t) THEN
t:=t+1;
else t:=0;
if (m<30) then
n:=m+cnty;
FOR i IN 29 DOWNTO 0 LOOP
if (i=m) then
io(i)<='1';
elsif (i=n) then
io(i)<='0';
else
io(i)<='1';
end if;
END LOOP;
m:=m+1;
else m:=0;
end if;
END IF;
END IF;
END IF;
END PROCESS;
END ; |
