************************************************************
* SpiDemo - Demonstrates the use of the 68HC12 SPI by
* interfacing with a 74HC595 and 74HC165.
*
* Controller: 68HC912B32
* Monitor: D-Bug12
*
* 3/5/98 Todd Morton
************************************************************
* Equates
************************************************************
PORTS equ $d6
DDRS equ $d7
DDRP equ $57
PORTP equ $56
PP0 equ $01
SS equ %10000000
MOSI equ %00100000
SCK equ %01000000
SP0CR1 equ $d0
SP0CR2 equ $d1
SP0BR equ $d2
SP0SR equ $d3
SP0DR equ $d5
SPIF equ $80
INPUT equ $0fe0
OUTBYTE equ $0fe6
************************************************************
* Program
************************************************************
* Initialize SPI
* Set SPI outputs as outputs in DDRS
* SS pin is the latch clock for 74HC595.
* Set for 1Mbps
* Set PORTP bit0 for 74HC165 latch clock
* Clear SPIF
************************************************************
org $0800
main
bset DDRS,SS|MOSI|SCK
bset PORTS,SS
bset DDRP,PP0
bset PORTP,PP0
movb #$5c,SP0CR1
movb #$02,SP0BR
ldaa SP0SR ;clear flag
ldaa SP0DR
************************************************************
* Main interface loop
* A simple test loop that sends the ascii character
* entered out to the 74HC595. It then reads a value
* from the 74HC165 and displays it.
* For testing connect the 74HC595 Qn's to the 74HC165 n's
* This will cause the ascii character of the key pressed
* be echoed.
************************************************************
next_in jsr INPUT
beq next_in
jsr SpiOut
jsr SpiIn
pshb
tfr sp,d
jsr OUTBYTE
pulb
bra next_in
************************************************************
* SpiOut - Output routine for a 74HC595. It uses SS as the
* latch clock.(SS is a GP output)
* Spi Initialization: (could be done in main init if it
* was the only setup needed)
* SPCR = $5c ->SPI Enable,Master,CPOL:CPHA = 11
* The data to be sent out is passed in ACCB. Result of
* dummy read is returned in ACCB.
* All other registers are preserved except CCR
************************************************************
SpiOut
movb #$5c,SP0CR1
stab SP0DR ;Output data
wait_spiout brclr SP0SR,SPIF,wait_spiout ;Wait for shift complete
bclr PORTS,SS ;Transfer SR->Latch
bset PORTS,SS
ldab SP0DR ;dummy read to clear SPIF
rts
************************************************************
* SpiIn - Input routine for a 74HC165. It uses PP0 as the
* latch clock.
* Spi Initialization: (could be done in main init if it
* was the only setup needed)
* SPCR = $58 ->SPI Enable,Master,CPOL:CPHA = 10
* The dummy data to be sent out is passed in ACCB. Input
* value is returned in ACCB.
* All other registers are preserved except CCR
************************************************************
SpiIn
bclr PORTP,PP0 ;Transfer SR<-Latch
bset PORTP,PP0
movb #$58,SP0CR1
stab SP0DR ;Dummy data
wait_spiin brclr SP0SR,SPIF,wait_spiin ;Wait for shift complete
ldab SP0DR
rts |