ENTITY fsm IS
PORT(x,y,clk:IN BIT;z:OUT BIT);
END fsm;
ARCHITECTURE su OF fsm IS
COMPONENT logical_part
PORT(in0,in1,q0,q1:IN BIT;d0,d1:OUT BIT);
END COMPONENT;
COMPONENT memory_part
PORT(d_in0,d_in1,clk:IN BIT;d_out0,d_out1:OUT BIT);
END COMPONENT;
SIGNAL IS1,IS2,IS3,IS4:BIT;
BEGIN
c1:logical_part PORT MAP(x,y,IS2,IS3,IS4,z);
c2:memory_part PORT MAP(IS3,IS4,clk,IS1,IS2);
END su;
ENTITY logical_part IS
PORT(in0,in1,q0,q1:IN BIT;d0,d1:OUT BIT);
END logical_part;
ARCHITECTURE dataflow OF logical_part IS
BEGIN
d0<=(in0 AND q0)OR(x AND q1);
d1<=(NOT q0)AND(NOT q1)AND in_0;
out1<=(NOT in_0)AND(NOT in_1)AND q0;
END dataflow;
ENTITY memory_part IS
PORT(d_in0,d_in1,clk:IN BIT;d_out0,d_out1:OUT BIT);
END memory_part;
ARCHITECTURE dataflow OF memory_part IS
BEGIN
BLOCK(clk='1' AND clk'event)
BEGIN
d_out0<=GUARDED d_in0;
d_out1<=GUARDED d_in1;
END BLOCK
END dataflow;
请问这个程序应该写在一个文件还是3个文件，无论我写在一个文件还是3个文件都有很多错误请各位指点 | 
