sopc中选择File->New Component 在Component Editor -〉HDL File里添加自己的*.V 文件,自动编译完出现下列错误提示: Error: command "quartus_map --generate_hdl_interface=E:/Gar/IPCORE/rtc/ce_temp_directory/rtc_top.v ce_temp_directory/ce_temp_quartus_project" returned 3 Error: Verilog HDL or VHDL error: error generating xml interface file for HDL file %s, interface file not generated.E:/Gar/IPCORE/rtc/ce_temp_directory/rtc_top.v Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warnings Error: Processing ended: Thu Jan 04 10:12:55 2007 Error: Elapsed time: 00:00:01 Error: E:/Gar/IPCORE/rtc/ce_temp_directory/rtc_top.v.xml does not exist 在quartus中单独编译此*.v文件是可以通过的。 请问谁遇到过这个问题? 怎么解决? |