STM32-移植FATFS的NANDFLASH驱动（6） include

yuyang911220

2，fsmc_nand.h文件：

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• /* Define to prevent recursive inclusion -------------------------------------*/
  
• #ifndef __FSMC_NAND_H
  
• #define __FSMC_NAND_H
  
• 
  
• /* Includes ------------------------------------------------------------------*/
  
• #include "stm32f10x.h"
  
• 
  
• /* Exported types ------------------------------------------------------------*/
  
• typedef
  struct
  
• {  
•    uint8_t Maker_ID;  
•    uint8_t Device_ID;  
•    uint8_t Third_ID;  
•    uint8_t Fourth_ID;  
• }NAND_IDTypeDef;  
• 
  
• typedef
  struct
  
• {  
•    uint16_t Zone;  
•    uint16_t Block;  
•    uint16_t Page;  
• } NAND_ADDRESS;  
• 
  
• /* Exported constants --------------------------------------------------------*/
  
• /* NAND Area definition  for STM3210E-EVAL Board RevD */
  
• #define CMD_AREA                   (uint32_t)(1<<16)  /* A16 = CLE high */
  
• #define ADDR_AREA                  (uint32_t)(1<<17)  /* A17 = ALE high */
  
• #define DATA_AREA                  ((uint32_t)0x00000000)
  
• 
  
• /* FSMC NAND memory command */
  
• #define NAND_CMD_READ1             ((uint8_t)0x00)
  
• #define NAND_CMD_READ2            ((uint8_t)0x30)
  
• 
  
• #define NAND_CMD_WRITE0            ((uint8_t)0x80)
  
• #define NAND_CMD_WRITE1            ((uint8_t)0x10)
  
• 
  
• #define NAND_CMD_MOVE0             ((uint8_t)0x00)
  
• #define NAND_CMD_MOVE1             ((uint8_t)0x35)
  
• #define NAND_CMD_MOVE2             ((uint8_t)0x85)
  
• #define NAND_CMD_MOVE3             ((uint8_t)0x10)
  
• 
  
• #define NAND_CMD_ERASE0            ((uint8_t)0x60)
  
• #define NAND_CMD_ERASE1            ((uint8_t)0xD0)
  
• 
  
• #define NAND_CMD_READID            ((uint8_t)0x90)
  
• #define NAND_CMD_IDADDR            ((uint8_t)0x00)
  
• 
  
• #define NAND_CMD_STATUS            ((uint8_t)0x70)
  
• #define NAND_CMD_RESET             ((uint8_t)0xFF)
  
• 
  
• /* NAND memory status */
  
• #define NAND_VALID_ADDRESS         ((uint32_t)0x00000100)
  
• #define NAND_INVALID_ADDRESS       ((uint32_t)0x00000200)
  
• #define NAND_TIMEOUT_ERROR         ((uint32_t)0x00000400)
  
• #define NAND_BUSY                  ((uint32_t)0x00000000)
  
• #define NAND_ERROR                 ((uint32_t)0x00000001)
  
• #define NAND_READY                 ((uint32_t)0x00000040)
  
• 
  
• /* FSMC NAND memory parameters */
  
• //#define NAND_PAGE_SIZE             ((uint16_t)0x0200) /* 512 bytes per page w/o Spare Area */
  
• //#define NAND_BLOCK_SIZE            ((uint16_t)0x0020) /* 32x512 bytes pages per block */
  
• //#define NAND_ZONE_SIZE             ((uint16_t)0x0400) /* 1024 Block per zone */
  
• //#define NAND_SPARE_AREA_SIZE       ((uint16_t)0x0010) /* last 16 bytes as spare area */
  
• //#define NAND_MAX_ZONE              ((uint16_t)0x0004) /* 4 zones of 1024 block */
  
• 
  
• /* FSMC NAND memory HY27UF081G2A-TPCB parameters */
  
• #define NAND_PAGE_SIZE             ((uint16_t)0x0800) /* 2048 bytes per page w/o Spare Area */
  
• #define NAND_BLOCK_SIZE            ((uint16_t)0x0040) /* 64x2048 bytes pages per block */
  
• #define NAND_ZONE_SIZE             ((uint16_t)0x0200) /* 512 Block per zone */
  
• #define NAND_SPARE_AREA_SIZE       ((uint16_t)0x0040) /* last 64 bytes as spare area */
  
• #define NAND_MAX_ZONE              ((uint16_t)0x0002) /* 2 zones of 1024 block */
  
• 
  
• /* FSMC NAND memory data computation */
  
• #define DATA_1st_CYCLE(DATA)       (uint8_t)((DATA)& 0xFF)               /* 1st data cycle */
  
• #define DATA_2nd_CYCLE(DATA)       (uint8_t)(((DATA)& 0xFF00) >> 8)      /* 2nd data cycle */
  
• #define DATA_3rd_CYCLE(DATA)       (uint8_t)(((DATA)& 0xFF0000) >> 16)   /* 3rd data cycle */
  
• #define DATA_4th_CYCLE(DATA)       (uint8_t)(((DATA)& 0xFF000000) >> 24) /* 4th data cycle */
  
• 
  
• /* FSMC NAND memory HY27UF081G2A-TPCB address computation */
  
• #define ADDR_1st_CYCLE(PADDR)       (uint8_t)(0x0)          /* 1st addressing cycle */
  
• #define ADDR_2nd_CYCLE(PADDR)       (uint8_t)(0x0)     /* 2nd addressing cycle */
  
• #define ADDR_3rd_CYCLE(PADDR)       (uint8_t)(PADDR & 0xFF)      /* 3rd addressing cycle */
  
• #define ADDR_4th_CYCLE(PADDR)       (uint8_t)((PADDR>>8) & 0xFF) /* 4th addressing cycle */
  
• 
  
• /* Exported macro ------------------------------------------------------------*/
  
• /* Exported functions ------------------------------------------------------- */
  
• void FSMC_NAND_Init(void);  
• void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID);  
• uint32_t FSMC_NAND_WriteSmallPage(uint8_t *pBuffer, uint32_t Address, uint32_t NumPageToWrite);  
• uint32_t FSMC_NAND_ReadSmallPage (uint8_t *pBuffer, uint32_t Address, uint32_t NumPageToRead);  
• uint32_t FSMC_NAND_MoveSmallPage (uint32_t SourcePageAddress, uint32_t TargetPageAddress);  
• //uint32_t FSMC_NAND_WriteSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaTowrite);
  
• //uint32_t FSMC_NAND_ReadSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaToRead);
  
• uint32_t FSMC_NAND_EraseBlock(uint32_t Address);  
• uint32_t FSMC_NAND_Reset(void);  
• uint32_t FSMC_NAND_GetStatus(void);  
• uint32_t FSMC_NAND_ReadStatus(void);  
• //uint32_t FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address);
  
• 
  
• #endif /* __FSMC_NAND_H */