ARM - STM32 使用11.0592MHz晶振 （2）

yuyang911220

其中读取时钟的函数RCC_GetClocksFreq函数如下：

[cpp] view plaincopy

• void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks)  
• {  
•   uint32_t tmp = 0, pllmull = 0, pllsource = 0, presc = 0;  
• 
  
• #ifdef  STM32F10X_CL
  
•   uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;  
• #endif /* STM32F10X_CL */
  
• 
  
• #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
  
•   uint32_t prediv1factor = 0;  
• #endif
  
• 
  
•   /* Get SYSCLK source -------------------------------------------------------*/
  
•   tmp = RCC->CFGR & CFGR_SWS_Mask;  
• 
  
•   switch (tmp)  
•   {  
•     case 0x00:  /* HSI used as system clock */
  
•       RCC_Clocks->SYSCLK_Frequency = HSI_VALUE;  
•       break;  
•     case 0x04:  /* HSE used as system clock */
  
•       RCC_Clocks->SYSCLK_Frequency = HSE_VALUE;  
•       break;  
•     case 0x08:  /* PLL used as system clock */
  
• 
  
•       /* Get PLL clock source and multiplication factor ----------------------*/
  
•       pllmull = RCC->CFGR & CFGR_PLLMull_Mask;  
•       pllsource = RCC->CFGR & CFGR_PLLSRC_Mask;  
• 
  
• #ifndef STM32F10X_CL      
  
•       pllmull = ( pllmull >> 18) + 2;  
• 
  
•       if (pllsource == 0x00)  
•       {/* HSI oscillator clock divided by 2 selected as PLL clock entry */
  
•         RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull;  
•       }  
•       else
  
•       {  
• #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
  
•        prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1;  
•        /* HSE oscillator clock selected as PREDIV1 clock entry */
  
•        RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull;   
• #else
  
•         /* HSE selected as PLL clock entry */
  
•         if ((RCC->CFGR & CFGR_PLLXTPRE_Mask) != (uint32_t)RESET)  
•         {/* HSE oscillator clock divided by 2 */
  
•           RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE >> 1) * pllmull;  
•         }  
•         else
  
•         {  
•           RCC_Clocks->SYSCLK_Frequency = HSE_VALUE * pllmull;  
•         }  
• #endif
  
•       }  
• #else
  
•       pllmull = pllmull >> 18;  
• 
  
•       if (pllmull != 0x0D)  
•       {  
•          pllmull += 2;  
•       }  
•       else
  
•       { /* PLL multiplication factor = PLL input clock * 6.5 */
  
•         pllmull = 13 / 2;   
•       }  
• 
  
•       if (pllsource == 0x00)  
•       {/* HSI oscillator clock divided by 2 selected as PLL clock entry */
  
•         RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull;  
•       }  
•       else
  
•       {/* PREDIV1 selected as PLL clock entry */
  
• 
  
•         /* Get PREDIV1 clock source and division factor */
  
•         prediv1source = RCC->CFGR2 & CFGR2_PREDIV1SRC;  
•         prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1;  
• 
  
•         if (prediv1source == 0)  
•         { /* HSE oscillator clock selected as PREDIV1 clock entry */
  
•           RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull;            
•         }  
•         else
  
•         {/* PLL2 clock selected as PREDIV1 clock entry */
  
• 
  
•           /* Get PREDIV2 division factor and PLL2 multiplication factor */
  
•           prediv2factor = ((RCC->CFGR2 & CFGR2_PREDIV2) >> 4) + 1;  
•           pll2mull = ((RCC->CFGR2 & CFGR2_PLL2MUL) >> 8 ) + 2;   
•           RCC_Clocks->SYSCLK_Frequency = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;                           
•         }  
•       }  
• #endif /* STM32F10X_CL */
  
•       break;  
• 
  
•     default:  
•       RCC_Clocks->SYSCLK_Frequency = HSI_VALUE;  
•       break;  
•   }  
• 
  
•   /* Compute HCLK, PCLK1, PCLK2 and ADCCLK clocks frequencies ----------------*/
  
•   /* Get HCLK prescaler */
  
•   tmp = RCC->CFGR & CFGR_HPRE_Set_Mask;  
•   tmp = tmp >> 4;  
•   presc = APBAHBPrescTable[tmp];  
•   /* HCLK clock frequency */
  
•   RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> presc;  
•   /* Get PCLK1 prescaler */
  
•   tmp = RCC->CFGR & CFGR_PPRE1_Set_Mask;  
•   tmp = tmp >> 8;  
•   presc = APBAHBPrescTable[tmp];  
•   /* PCLK1 clock frequency */
  
•   RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency >> presc;  
•   /* Get PCLK2 prescaler */
  
•   tmp = RCC->CFGR & CFGR_PPRE2_Set_Mask;  
•   tmp = tmp >> 11;  
•   presc = APBAHBPrescTable[tmp];  
•   /* PCLK2 clock frequency */
  
•   RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> presc;  
•   /* Get ADCCLK prescaler */
  
•   tmp = RCC->CFGR & CFGR_ADCPRE_Set_Mask;  
•   tmp = tmp >> 14;  
•   presc = ADCPrescTable[tmp];  
•   /* ADCCLK clock frequency */
  
•   RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc;  
• }  

stm32f10x.h
[cpp] view plaincopy

• #if !defined  HSE_VALUE
  
• #ifdef STM32F10X_CL   
  
•   #define HSE_VALUE    ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
  
• #else
  
•   #define HSE_VALUE    ((uint32_t)11059200) /*!< Value of the External oscillator in Hz */
  
• #endif /* STM32F10X_CL */
  
• #endif /* HSE_VALUE */