/**
* @}
*/ /** @addtogroup STM32F10x_System_Private_Functions
* @{
*/ /**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)//系统初始化函数，设置系统的时钟及时钟中断（在startup_stm32f10x_md.s中调用）(复位RCC时钟配置为默认状态，直到设置时钟函数)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001; //内部高速时钟使能,内部8MHz时钟开启
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#ifndef STM32F10X_CL
RCC->CFGR &= (uint32_t)0xF8FF0000;//MCO微控制器没有时钟输出(对外部引脚),ADC预分频PCLK2 2分频后作为ADC时钟,APB预分频HCLK不分频,AHB预分频SYSCLK不分频,HSI作为系统时钟
//HSI作为系统时钟输出（已输出），SYSCLK=PCLK=PCLK1=PCLK2=8M，ADCCLK=1/2(PCLK2)=4M
#else
RCC->CFGR &= (uint32_t)0xF0FF0000;//同上；RCC->CFGR的27位为保留位始终为0 ，HSI作为系统时钟输出（未输出原因为未编译）
#endif /* STM32F10X_CL */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF;//时钟监测器关闭,HSE振荡器关闭
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;//外部4-25MHz振荡器没有旁路
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= (uint32_t)0xFF80FFFF; //PLL时钟1.5倍分频作为USB时钟,PLL 2倍频输出,HSE不分频,HSI时钟2分频后作为PLL输入时钟
//PLLCLK=HSICLK=8M（还未输出）,HSECLK=HSEOSC,USBCLK=PLLCLK/1.5 ，除PLL外其他分频系数都为0
#ifdef STM32F10X_CL
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= (uint32_t)0xEBFFFFFF;//CR中的26和28位置0 /* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000;//清除中断标志，关闭一些中断
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000; //没有此寄存器
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000;//清除中断标志，关闭一些中断
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000; //没有此寄存器
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000; //清除中断标志，关闭一些中断
#endif /* STM32F10X_CL */
#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();//如果宏定义了外部SRAM则对其初始化控制
#endif /* DATA_IN_ExtSRAM */
#endif /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();//设置系统时钟
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. 向量表放在内部SRAM中*/
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. 向量表放在内部flash中*/
#endif
} /**
* @brief Update SystemCoreClock according to Clock Register Values
* @note None
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmull = 0, pllsource = 0; #ifdef STM32F10X_CL
uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;
#endif /* STM32F10X_CL */ #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
uint32_t prediv1factor = 0;
#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ | 
