The bad news is that demands for DSP processing are going up and programmable DSPs may not be able to do it all. The good news is that faster, denser, and smarter FPGAs can. FPGAs are now moving up on the outside rail to take on a number of DSP functions. Moreover, FPGAs are mutating from generalized available logic and state cells to more specialized application engines, tailored for specific interfacing and processing tasks.
FPGAs are coming into their own as specialized DSP engines. Higher density and faster FPGAs coupled with specialized IP functions and RAM blocks are bringing heavyweight processing to the DSP application arena. Increasingly, DSPs are deployed to do the front-end processing and signal conditioning for wireless applications. For example, FPGAs are now being used to handle Forward-Error-Correction (FEC) in cellular base stations.
The really good news is that today designers have some pretty solid FPGA design choices for specialized DSP processing. Three possible approaches are:
- Approach 1: Put your design all in logic using large and fast arrays of FPGA gates, some running to over 1 M usable gates with on-chip clock rates to 200 MHz. RAM blocks are also available for silicon-efficient storage.
- Approach 2: Use special hardwired, IP logic and functions. Hybrid FPGAs with hardwired, ASIC DSP function blocks and FPGA datapaths and control logic can do the job more efficiently. RAM blocks are also available to supply efficient on-chip memory.
- Approach 3: Use only the functional DSP logic you need coupled with standard on-chip IP blocks such as SRAM, processors, and peripherals. And use dynamically reconfigurable FPGA logic to do adaptive and staged DSP processing with a limited amount of FPGA logic cell resources.
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