always @(posedge osc or posedge rst)
begin
if (rst)
begin
led <= 0;
flag_add <= 0;
flag_minus <= 0;
end
else
begin
flag_add <= add;
flag_minus <= minus;
if (add && !flag_add)
begin
led <= led + 3'b1;
end
else if (minus && !flag_minus)
begin
led <= led - 3'b1;
end
else
led <= led;
end
end