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各位前辈,我是初学的,这是我写的可控分频,想用task来完成,但是编译说always的所在行和第一行有错,搞不懂。是不是always不能放到task里面啊??请各位前辈赐教!!!
module div_1 (clk,clear,out,sel);
input clk,clear;
input [1:0] sel;
output out;
reg out;
task div_to_1;
input clk_in1,clear_in1;
output clk_out1;
reg clk_out1;
reg [3:0] i;
always @(posedge clk_in1 or negedge clear_in1)
begin
if (!clear_in1)
begin
clk_out1=0;
i=0;
end
else if(i==1)
begin
clk_out1=!clk_out1;
i=0;
end
else i=i+1;
end
endtask
task div_to_2;
input clk_in2,clear_in2;
output clk_out2;
reg clk_out2;
reg [3:0] j;
always @(posedge clk_in2 or negedge clear_in2)
begin
if (!clear_in2)
begin
clk_out2=0;
j=0;
end
else if(j==2) //`DIVNUM)
begin
clk_out2=!clk_out2;
j=0;
end
else j=j+1;
end
endtask
task div_to_3;
input clk_in3,clear_in3;
output clk_out3;
reg clk_out3;
reg [3:0] k;
always @(posedge clk_in3 or negedge clear_in3)
begin
if (!clear_in3)
begin
clk_out3=0;
k=0;
end
else if(k==3) //`DIVNUM)
begin
clk_out3=!clk_out3;
k=0;
end
else k=k+1;
end
endtask
if (sel==2'b01) div_to_1(clk,clear,out);
if (sel==2'b10) div_to_2(clk,clear,out);
if (sel==2'b11) div_to_3(clk,clear,out);
endmodule |
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