计数小程序老报错，请指教。多谢。 程序, 计数, 指教

csz

我想自己做一个电子表， 因为我的眼睛近视，晚上看指针的表不大方便。我想用6个7段数码管来显示时间。用上下左右四个方向信号来调整时间。下面这个小程序段只是一个分频。但是编译总报错：error:line 22:file ......timer.vhd:unsupported feature error:non-locally-static attribute names supported.---不支持的特征错误：本地的静态属性名称不支持。
请指教。

 library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity timer is
port(clk:in std_logic;
s100ut std_logic);
end timer;

architecture arch of timer is
signal xishu120000:std_logic_vector(16 DOWNTO 0);
signal s100s:std_logic;
begin

fenpin:process(clk)
begin
if(clk'event and clk<='1')then
xishu120000<=xishu120000+"1";
elsif(xishu120000<="11101010011000000")then
xishu120000<="00000000000000000";
s100s<=not s100s;
end if;

s100<=s100s;
end process;
end arch;

stone133

把arch换个名字试试看

elsif(xishu120000<="11101010011000000")是不是有点问题？（）中应该用＝＝

fflower

if(clk'event and clk<='1')then
xishu120000<=xishu120000+"1";
elsif(xishu120000<="11101010011000000")then
这个 有点问题吧   IFif(clk'event and clk<='1')then
xishu120000<=xishu120000+"1";

后面能接 ELSIF 吗??   

一切从零开始

逻辑结构错误
首先if(clk'event and clk<='1')then中clk='1'就可以了，不是信号赋值
其次下面的结构不对，
if(clk'event and clk<='1')then
if(xishu120000<="11101010011000000")then
xishu120000<="00000000000000000";
s100s<=not s100s;
else
xishu120000<=xishu120000+"1";
end if;
s100<=s100s;
end process;
我比较喜欢用case 语句，也可以这样
process(clk)
variable count:integer range 0 to 120000;
variable s100s:std_logic;
begin
if(clk'event and clk='1')then
 case count is
   when 120000=>count:=0;
      s100<=s100s;
      s100s:=not s100s;
  when others=>count:=count+1;
 end case;
end if;
end process;

anny1209

一切从零开始說的是對的