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FPGA/CPLD可编程逻辑

[ 26527 主题 / 25683 回复 ]

版块介绍: 讨论关于FPGA和CPLD的相关话题!

版主: boyfly, stone133, flanix, bydxdtcdj, 电子狂热, xcx_hust, benbenfei, AndyLee008

FPGA/CPLD可编程逻辑

    标题 作者 回复/查看 最后发表
common   关于spartan6程序下载 yuchengze 2016-11-24 0/576 yuchengze 2016-11-24 22:33
common   Spartan3 XC3S50AN,可以program FPGA Only,无法Program Flash and FPGA yuchengze 2016-11-24 0/675 yuchengze 2016-11-24 22:32
common   学习FPGA有哪些好处,和要注意的地方 yuchengze 2016-11-24 0/520 yuchengze 2016-11-24 22:30
common   谈谈国产芯,为何形势大好却越走越艰难 yuchengze 2016-11-24 0/661 yuchengze 2016-11-24 22:29
common   quartus13.1 关联 notepad++后的问题请教 yuchengze 2016-11-24 0/591 yuchengze 2016-11-24 22:27
common   quartus 15版本 的IP核 的问题 yuchengze 2016-11-24 0/383 yuchengze 2016-11-24 22:24
common   pattern是否正确呢 yuchengze 2016-11-24 0/433 yuchengze 2016-11-24 22:21
common   新手,请教一个VHDL程序编译报错问题 yuchengze 2016-11-24 0/387 yuchengze 2016-11-24 22:18
common   如何分配FPGA各个管脚的网络功能 yuchengze 2016-11-24 0/376 yuchengze 2016-11-24 22:17
common   请问各位大侠,我想学习CPLD,需要学习哪些知识? yuchengze 2016-11-24 0/355 yuchengze 2016-11-24 22:16
common   NIOS IDE是否有BUG啊? yuchengze 2016-11-24 0/472 yuchengze 2016-11-24 22:15
common   请教FPGA的硬件设计问题,谢谢 yuchengze 2016-11-24 0/390 yuchengze 2016-11-24 22:14
common   请教关于SPARTAN-3E的问题 yuchengze 2016-11-24 0/691 yuchengze 2016-11-24 22:13
common   请问有没有高人用FPGA做过线性插值运算? yuchengze 2016-11-24 0/337 yuchengze 2016-11-24 22:07
common   关于桶形移位器 yuchengze 2016-11-24 0/344 yuchengze 2016-11-24 22:06
common   NiosII编程中遇到的问题 yuchengze 2016-11-24 0/668 yuchengze 2016-11-24 22:04
common   请问fpga能否做radio switch yuchengze 2016-11-24 0/435 yuchengze 2016-11-24 22:03
common   请问图中34063 DC-DC电路中,V1是起过流或过压保护作用吗? yuchengze 2016-11-24 0/366 yuchengze 2016-11-24 22:02
common   emp7128的vccint引脚电压 yuchengze 2016-11-24 0/439 yuchengze 2016-11-24 22:00
common   有人用过altium做VHDL的波形仿真吗? yuchengze 2016-11-24 0/414 yuchengze 2016-11-24 21:58
common   FPGA引脚直接接6.25V yuchengze 2016-11-24 0/351 yuchengze 2016-11-24 21:57
common   请教SPARTAN-3E的一个问题 yuchengze 2016-11-24 0/460 yuchengze 2016-11-24 21:56
common   基于verilog的数字密码锁 yuchengze 2016-11-24 0/428 yuchengze 2016-11-24 21:54
common   关于FPGA特殊引脚CRC_ERROR 在QII中如何设置为普通IO口? yuchengze 2016-11-24 0/477 yuchengze 2016-11-24 21:53
common   【求助】:在ISE10.1功能仿真时正确,时序仿真结果出错 [ yuchengze 2016-11-24 0/530 yuchengze 2016-11-24 21:49
common   FPGA 下载问题 yuchengze 2016-11-24 0/362 yuchengze 2016-11-24 21:47
common   做PS2发现的奇怪问题,求解答 yuchengze 2016-11-24 0/423 yuchengze 2016-11-24 21:45
common   请教关于SPARTAN-3E的问题 yuchengze 2016-11-24 0/583 yuchengze 2016-11-24 21:43
common   有人用actel的fpga吗? yuchengze 2016-11-24 0/489 yuchengze 2016-11-24 21:42
common   帮我看看这个程序哪有错? yuchengze 2016-11-24 0/360 yuchengze 2016-11-24 21:40
common   在7x24小时的应用中,是否需要考虑FPGA软错误? yuchengze 2016-11-24 0/588 yuchengze 2016-11-24 21:38
common   altrea I/O配置 yuchengze 2016-11-24 0/387 yuchengze 2016-11-24 21:37
common   请教多块芯片同时烧写的问题 yuchengze 2016-11-24 0/503 yuchengze 2016-11-24 21:36
common   一个关于verilog的程序,请教下!! yuchengze 2016-11-24 0/457 yuchengze 2016-11-24 21:33
common   连载4-《锁相环技术原理及FPGA实现》-前言 yuchengze 2016-11-24 0/519 yuchengze 2016-11-24 21:32
common   两种写法,感觉应该更稳定,却出现了问题 yuchengze 2016-11-24 0/386 yuchengze 2016-11-24 21:29
common   Xilinx FPGA入门31:超声波测距回响脉宽计数之均值滤波处理 yuchengze 2016-11-24 0/343 yuchengze 2016-11-24 21:28
common   连载5-《锁相环技术原理及FPGA实现》-4.1. yuchengze 2016-11-24 0/486 yuchengze 2016-11-24 21:25
common   vivado 设置上电加载速度 yuchengze 2016-11-24 0/566 yuchengze 2016-11-24 21:24
common   FPGA开发板xilinx spartan-6 xc6slx100T yuchengze 2016-11-24 0/449 yuchengze 2016-11-24 21:23
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