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FPGA/CPLD可编程逻辑

[ 26527 主题 / 25683 回复 ]

版块介绍: 讨论关于FPGA和CPLD的相关话题!

版主: boyfly, stone133, flanix, bydxdtcdj, 电子狂热, xcx_hust, benbenfei, AndyLee008

FPGA/CPLD可编程逻辑

    标题 作者 回复/查看 最后发表
common   FPGA Verilog语言中阻塞赋值与非阻塞赋值个人看法 冰封 2016-11-25 0/340 冰封 2016-11-25 15:08
common   基于IP核的FPGA 设计方法 冰封 2016-11-25 0/571 冰封 2016-11-25 15:07
common   上位机与FPGA通信时的数据存储问题 yuchengze 2016-11-24 0/590 yuchengze 2016-11-24 23:05
common   例说FPGA连载3:FPGA与其它主流芯片的比较 [ yuchengze 2016-11-24 0/476 yuchengze 2016-11-24 23:03
common   [FPGA] 求助以太网相关IP核例化 yuchengze 2016-11-24 0/410 yuchengze 2016-11-24 23:02
common   求助:Altera的8B10B的IP核是不是免费的,在哪个路径下? yuchengze 2016-11-24 0/391 yuchengze 2016-11-24 22:58
common   [verilog] 求大神指点一个wire型变量小疑惑 yuchengze 2016-11-24 0/389 yuchengze 2016-11-24 22:57
common   xilinx的FPGA编写IIC代码后时钟约束问题求教 [ yuchengze 2016-11-24 0/319 yuchengze 2016-11-24 22:54
common   [VHDL] DAC驱动 yuchengze 2016-11-24 0/320 yuchengze 2016-11-24 22:53
common   [CPLD] 请教一条VERILOG的语句 yuchengze 2016-11-24 0/370 yuchengze 2016-11-24 22:52
common   xilinx的FPGA编写IIC代码后时钟约束问题求教 [ yuchengze 2016-11-24 0/344 yuchengze 2016-11-24 22:50
common   [CPLD] STM32如何通过SPT读取CPLD中的数值? yuchengze 2016-11-24 0/377 yuchengze 2016-11-24 22:49
common   [CPLD] 遇到一件怪事 yuchengze 2016-11-24 0/374 yuchengze 2016-11-24 22:47
common   仿真加密算法时遇到问题,求大神帮忙 yuchengze 2016-11-24 0/573 yuchengze 2016-11-24 22:46
common   例说FPGA连载12:状态初始——复位电路 yuchengze 2016-11-24 0/458 yuchengze 2016-11-24 22:44
common   请教各位一个关于小数乘法的问题 yuchengze 2016-11-24 0/345 yuchengze 2016-11-24 22:43
common   自己编写的模块,EOC是输入引脚,但读不出来 yuchengze 2016-11-24 0/341 yuchengze 2016-11-24 22:42
common   FPGA工作不稳定,但是加入了SignalTap之后就稳定了 yuchengze 2016-11-24 0/330 yuchengze 2016-11-24 22:41
common   有什么原因导致FPGA能通过JTAG成功下载,但是不能正常运行? yuchengze 2016-11-24 0/580 yuchengze 2016-11-24 22:39
common   求助,含FPGA芯片的控制板布线时的注意事项 yuchengze 2016-11-24 0/489 yuchengze 2016-11-24 22:34
common   关于spartan6程序下载 yuchengze 2016-11-24 0/572 yuchengze 2016-11-24 22:33
common   Spartan3 XC3S50AN,可以program FPGA Only,无法Program Flash and FPGA yuchengze 2016-11-24 0/674 yuchengze 2016-11-24 22:32
common   学习FPGA有哪些好处,和要注意的地方 yuchengze 2016-11-24 0/516 yuchengze 2016-11-24 22:30
common   谈谈国产芯,为何形势大好却越走越艰难 yuchengze 2016-11-24 0/656 yuchengze 2016-11-24 22:29
common   quartus13.1 关联 notepad++后的问题请教 yuchengze 2016-11-24 0/588 yuchengze 2016-11-24 22:27
common   quartus 15版本 的IP核 的问题 yuchengze 2016-11-24 0/379 yuchengze 2016-11-24 22:24
common   pattern是否正确呢 yuchengze 2016-11-24 0/429 yuchengze 2016-11-24 22:21
common   新手,请教一个VHDL程序编译报错问题 yuchengze 2016-11-24 0/382 yuchengze 2016-11-24 22:18
common   如何分配FPGA各个管脚的网络功能 yuchengze 2016-11-24 0/372 yuchengze 2016-11-24 22:17
common   请问各位大侠,我想学习CPLD,需要学习哪些知识? yuchengze 2016-11-24 0/354 yuchengze 2016-11-24 22:16
common   NIOS IDE是否有BUG啊? yuchengze 2016-11-24 0/471 yuchengze 2016-11-24 22:15
common   请教FPGA的硬件设计问题,谢谢 yuchengze 2016-11-24 0/387 yuchengze 2016-11-24 22:14
common   请教关于SPARTAN-3E的问题 yuchengze 2016-11-24 0/687 yuchengze 2016-11-24 22:13
common   请问有没有高人用FPGA做过线性插值运算? yuchengze 2016-11-24 0/333 yuchengze 2016-11-24 22:07
common   关于桶形移位器 yuchengze 2016-11-24 0/340 yuchengze 2016-11-24 22:06
common   NiosII编程中遇到的问题 yuchengze 2016-11-24 0/667 yuchengze 2016-11-24 22:04
common   请问fpga能否做radio switch yuchengze 2016-11-24 0/431 yuchengze 2016-11-24 22:03
common   请问图中34063 DC-DC电路中,V1是起过流或过压保护作用吗? yuchengze 2016-11-24 0/363 yuchengze 2016-11-24 22:02
common   emp7128的vccint引脚电压 yuchengze 2016-11-24 0/435 yuchengze 2016-11-24 22:00
common   有人用过altium做VHDL的波形仿真吗? yuchengze 2016-11-24 0/413 yuchengze 2016-11-24 21:58
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